Mainboard ESC Model RS485M
Mainboard ESC Model RS485M
5 4 3 2 1
RS485M-M
1 Cover Page
BASED ON RES485-M VER:A
2 Block Diagram PCB:244mm*244mm
3 Clock Generator
Rev : 1.0
L2:PWR
L3:GND
D 4 Power (CPU Vcore),
Intersil 6566(DCR Sense) D
5 Power A(DC to DC) VER:B ->C
1. FIX V_DIMM & GND SHORT BY THERMAL PAD IN LAYER3.
6 Power B(DC to DC),PWR sequence&good 2. ADD D22...........................................................................P6
3. ADD C525............................................................ ..............P24
7 K8 - M2 CPU (HT) D VER:C ->D
1. ADD R609,R610, CHANGE R554/R555 value.............................................P3
8 K8 - M2 CPU (MEM) A 2. DEL U8,R586~R590. ADD R653~R655...................................................P7
3. CHANGE CODEC CIRCUIT TO STANDARD 655/883 CO LAY.. ...........................P21,P32
4. ADD TPM CIRCUIT..........................................................P21,P24,P26
9 K8 - M2 CPU (CTRL) B,C 5. ADD IR1 & R656................................................. .................P24
6. CHANGE CPU & SYS FAN TO 3/4 pin CO LAY.......................................P24,P29
7. ADD Q62 FOR MSG LED................................................ .............P29
10 K8 - M2 CPU (POWER,GND) E,F,G,H 8. ADD 6307/6308P CO LAY CIRCUIT................................ ...................P31
9. ADD 655/833 CO LAY CIRCUIT.................................... ...............P32,P33
11 NB - RS485(HT LINK0 IF) A RS485-M940 VER:D ->RS485M-M VER:1.0
1. CHANGE AC97_OSCIN TO U6 PIN 54................... ................................P3
12 NB - RS485 (PCI-E LINK I/F) B 2. ADD C550 FOR EMI................................................ ..................P3
3. ADD Q67 & R678 FOR PWM UPDATE.....................................................P4
4. ADD C547................................................................. ........P6
13 NB - RS485 (SYSTEM I/F) C 5. ADD R668~R673 FOR ATi UPDATE......................................................P7
6. ADD C552 FOR EMI............................................. ...................P14
7. ADD C554~C556 FOR EMI...................................... .....................P20
C
14 NB - RS485 (POWER & GND) D,E 8. ADD SR4 & SR5 FOR ATi UPDATE.....................................................P21
C
9. ADD C553 FOR EMI & IR1........................................ ...................P24
10. DEL C546 & FB11................................................ .................P27
15 DIMM1 & DIMM2(Dual Channel) 11. ADD F8............................................................ .............P27
12. DEL 6308'S PME PIN FOR VIA UPDATE...............................................P31
13. ADD AUXIN ........................................................ .............P32
16 DIMM3 & DIMM4(Dual Channel)
17 DDR2 DIMMS POWER
18 DDR2 TERMINATION
19 PCI Express Slot x16 & x1
20 SB - ATI SB460/600(PCIE, PCI, CPU, LPC)
21 SB - ATI SB460/600(APIC, GPIO, AUDIO, USB)
22 SB - ATI SB460/600(SATA, IDE,HWM,SPI)
23 SB - ATI SB460/600(STRAPS, PWR, DECOUPLING)
B B
24 LPC SIO-ITE8712F/IX, LPC ROM
Voltage Adjustment
25 PCI 1, PCI2 IDE Cable detect
-P66DET SB: GPIO9 VCC18 SIO_GPO20
26 PCI Extender & VGA SIO_GPO21
27 USB, IDE
28 COM, LPT
LED Blinking
G_LED1 SIO:GP10(PIN84) PCI Bus Resource
29 Front Panel, FAN G_LED2 SIO:GP53(PIN77) PCI1 AD16 INT E,FGH REQ0
30 LAN (RTL8100SB/8100C) PCI2 AD17 INT F,GHE REQ1
Other AD21 INT G REQ3
LAN
31 1394:VT6307/6308 BIOS_WP SIO:GP41(PIN28)
1394 AD24 INT H REQ4
WT_BEEP SIO:GP16(PIN29)
32 AUDIO ALC883/655 (CHIP) SIO_S4S5 SIO:GP40(PIN79)
33 AUDIO ALC883/655 (PANEL) GPO_1394 SIO:GP31
A GPO_LAN SIO:GP30 A
34 POWER DELIVERY CHART
35 CLOCK DISTRIBUTION
Elitegroup Computer Systems
Title
Cover Page
Size Document Number Rev
Custom 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 1 of 35
5 4 3 2 1
5 4 3 2 1
DDR2 400,533,667
Unbuffered DDR2 Unbuffered DDR2
AMD-K8 K8 POWER UP SEQUENCE
High Side*2 TO-252 64bit DIMM1 DIMM3
PWM Intersil AMD DESIGN GUIDE
Low Side*2 TO-252 ISL6566CR(DCR sense)
M2 RX480
Dual Channel
1.-PS_ON 1.-PS_ON
mPGA-940 DDR2 400,533,667
Unbuffered DDR2 Unbuffered DDR2
2.V_DIMM 2.VDDIO(V_DIMM)
Clock Generator
64bit DIMM2 DIMM4 DDRVTT VTT(DDRVTT)
D D
ICS 951416 HyperTransport 3.VCC25A 3.VDDA(VCC25A)
OUT FIRST LOGICAL DIMM SECOND LOGICAL DIMM
LINK0 IN
16x16 4.VCORE 4.VDD(VCORE)
5.VCC12 5.VLDT(VCC12)
6.PWROK
NB:ATI RS485
HT LINK0 CPU I/F
PCIE X 16 PCIE 16X
Integrated Graphics
1 16X PCIE VIDEO I/F
1 2X PCIE I/F with SB V_DIMM
DDRVTT
4 1X PCIE I/F
VCC25A
VCORE
VCC12
2X/4X ALINK
C C
460 :*8 SB:ATI SB460/600
USB 2.0
600 :*10 ATA66/100/133 IDE*1
USB2.0*10
SATA*4
AC97 2.3 & Azalia
AUDIO CODEC
HD I/F ATA 66/100/133 Serial ATA
ALC883 SATA*4
ACPI 2.0
RAID 0, 1, 0+1
LPC 1.1 Layout width/space
PCI BUS MII PCB 2116
NB RX480 USB(45/90) 20/8/8/8/20 (47/87)
PCI/PCI Bridge
VDDHT VCC1.2 0.5A 20/8/8/8/20 layout(47/87)
PCI-E CORE&VCO VCC1.2 2.25A LAN(50/100) 20/8/12/8/20 (47/91)
20/8/10/8/20 layout(47/90)
NB CORE NBCORE_1.2V 5A
1394 LAN SATA(50/100) 20/6/6/6/20 (57/98)
PCI*2 DAC Main Power VCC3 0.2A 20/5/7/5/20 layout(62/111)
VT6307 RTL8110S/ LPC BUS
DAC-Q&PLL VCCA1.8 0.1A
RTL8100C DAC Digital Power VDD_1.8A 0.3A PCI-E(50/100) 20/6/6/6/20 (57/98)
20/5/7/5/20 layout(62/111)
B
LVDS VDD_1.8A 0.1A B
1394(55/110) 20/6/9/6/20 (56/105)
BIOS TPM 20/6/9/6/20 layout(56/105)
2 Port 4M
ITE SIO 8712F/IX R.G.B (37.5) 20/9/18/9/18/9/20 ATI DEMO
25/5/25/5/25/5/25 layout
RJ45 Put 75 ohm on NB
(Impedence=37.5 ohm)
KB/
FLOPPY
MOUSE
22U/25DE 5*7 mm 2 D C
100U/16DE 6.3*11 mm D D C 3
220U/10DE 6.3*11 mm
A 470U/16DE 8*11 mm 1 23 E BC ECB A
1000U/10DE 8*14 mm 1 3 G S G S B E 1 2
G S
1500U/16DE 10*25 mm
TO-263 TO-263 TO-252 B C E SOT-23 SOT-23 SOT-23 T0-92 T0-92 T0-92 Elitegroup Computer Systems
3300U/25DE 10*25 mm
B55QS03 2SK3296 20N03 2N7002 2N3904 BAT54C LM431 2N2222A HSD882-D
Title
TM3055TL-S TO-251 SI2303S 2N3906 BAT54S 78L05-D 2N2097A
45N03
FDD6030L HI772(1.4W)
SI2301S MMBT2907A LM432 Block Diagram
(PNP) Size Document Number Rev
Custom 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 2 of 35
5 4 3 2 1
5 4 3 2 1
SRC(=PCI-E):Serial Reference Clock
ATIGCLK Divider Selection
VCC3 FB68 VCC3_CK ATIG_Div(3:0) ATIG_Div(3:0)
FB600P-08 (MHz)
1 2 1000 100.00
1 0011 114.29
1
C509 C510 C511 C512 C513 TBD 133.33
C508 TC42 .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 0010 160.00
10U-08 22U/25V
2
2
§ï FOOTPRINT
20051222
D D
1- PLACE ALL SERIAL TERMINATION VCC3
FB69
RESISTORS CLOSE TO CLOCK GEN
VCC3_CKPLL 1 2
2- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN POWER PIN FB120
1
VCC3_CK U6 C514
.1U-04 TC43
43 39 22U/25V-O §ï FOOTPRINT
2
VDDCPU VDDA 20051222
14 VDDSRC3 GNDA 38
21 VDDSRC2
32 45 R554 47-04
VDDSRC1 CPUCLK8T0 CPUCLK 7
35 44 R555 47-04
FB70 VDD_SRC0 CPUCLK8C0 CPUCLK- 7
VCC3 51 41
VDD_PCI CPUCLK8T1
1 2 3 VDD48 CPUCLK8C1 40
48 20060209 R609 261-1-04
FB120 C515 VDDHTT
56 VDDREF SRCCLKT7 12
.1U-04 13
SRCCLKC7
5 GND1 SRCCLKT6 16
55 GND2 SRCCLKC6 17
36 18 RN38 4 5 33-8P4R-04
GNDSRC0 SRCCLKT5 SBSRC_CLKP 20
31 GNDSRC1 SRCCLKC5 19 3 6 SBSRC_CLKN 20
26 GNDSRC2 SRCCLKT4 22 2 7 GPP_CLK0P 19
20 GNDSRC3 SRCCLKC4 23 1 8 GPP_CLK0N 19
15 GNDSRC4 SRCCLKT3 24
C516 49 25
GNDPCI SRCCLKC3 N1 R603 33-04
2 1 46 GNDHTT ATIGCLKT1 27 GFX_CLKP 19
C 42 28 N2 R604 33-04 C
GNDCPU ATIGCLKC1 GFX_CLKN 19
1
56P X6 30 N3 R601 33-04
ATIGCLKT0 NBSRC_CLKP 17
3 14.318MHZ 1 X1 ATIGCLKC0 29 N4 R602 33-04
NBSRC_CLKN 17
C517 34 R557 33-04
SBLINK_CLKP 17
2
SRCCLKT0 R556 33-04
2 1 2 X2 SRCCLKC0 33 SBLINK_CLKN 17
49.9-1-04
49.9-1-04
49.9-1-04
49.9-1-04
49.9-1-04
49.9-1-04
49.9-1-04
49.9-1-04
49.9-1-04
49.9-1-04
56P 6 50 20051129
NC PCICLK0
R558
R559
R560
R561
R562
R563
R564
R565
R566
R567
11,12,19,21,24,26 SMBCK 7 SCLK
11,12,19,21,24,26 SMBDT 8 SDATA
R568 33-04 OSC14M 52 20060331
17 NB_OSC REF2
54 FS0 R610 33-04 AC97_OSCIN 32
FS0/REF0 FS1 R570 33-04
37 IREF FS1/REF1 53 SB_OSC14 21
Ioh = 5 * Iref 9 FS2 20060331
(2.32mA) R569 FS2
Voh = 0.71V @ 60 ohm 475-1-04 R571 33-04
SIO_CLK48 24
4 R573 33-04
USB_48MHz CLK_48M_USB 21
47 R572 33-04
HTTCLK0 HTREFCLK 17
R574 0-04-O 11
R575 0-04-O CLKREQB# R576
10 CLKREQA# 51-1-04
TSSOP56
ICS951416
B ICS 951416(Programmable) B
H8 H7
20060403 1 8 1 8
CUSTOMER CAN ALSO USE CY28RS480 CLOCK AC97_OSCIN C550 1 2 22P-04 2 7 2 7
GENERATOR TO REPLACE ICS951412 WITHOUT NB_OSC C518 1 2 10P-04-O 3 6 3 6
SB_OSC14 C519 1 2 10P-04-O 4 5 4 5
HARDWARE CHANGE. BOTH CHIPs HAVE THE CLK_48M_USB C520 1 10P-04-O
2
SAME FOOTPRINT. SIO_CLK48 C521 1 2 10P-04-O TH TH
9
9
HTREFCLK C522 1 2 10P-04-O
H6 H5 H4
1 8 1 8 1 8
VCC3_CK 2 7 2 7 2 7
3 6 3 6 3 6
FS0 R577 10K-04 4 5 4 5 4 5
FS1 R579 10K-04
FS2 R578 10K-04 TH TH TH
EXT CLK FREQUENCY SELECT TABLE(MHZ)
9
9
9
FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT H3 H1 H2
[2:1] 1 8 1 8 1 8
2 7 2 7 2 7
3 6 3 6 3 6
0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved 4 5 4 5 4 5
0 0 1 X 100.00 X/3 X/6 48.00 Reserved TH TH TH
9
9
9
A A
0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved
AUGND
0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved
1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved
Elitegroup Computer Systems
1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved
Title
* 1 1 1 200.00 100.00 66.66 33.33 48.00 Normal ATHLON64 operation
Clock Generator
Size Document Number Rev
FS0,1,2 internal pull low(120K ohm) Custom
RS485M-M 1.0
Date: Friday, April 07, 2006 Sheet 3 of 35
5 4 3 2 1
5 4 3 2 1
VCC
E
Q67 B +12V_4P ATX12V
2N3906 1.UG,PHASE,LG change layer < 3
R678 2.Change layer(via hole = 2). 3 1
1 C
8.2K-04 +12V GND
3.Under PWM IC cut a power plane 4 +12V GND 2
VCC3 V_DIMM to be GND for thermal.
1
R269
10 C145 CONN-WAFER4P2R VCORE
1
1000P-O
2
2
1
R245
7
5
3
1
1
1
1
10K C228 EMI
RN9 R260 1U B to 1.0(12/28) C164 C163
2
2
20050412 2.2K-8P4R-O 2.2K-O 20050922 VIN 10U-08 10U-08
6,21 PG_VCORE
2
2
D D
U11 +12V_4P
8
6
4
2
2
1
7
1
ISL6566CR
C226 38 33 MC2
VCC
7 VID4 VID4 PVCC1
1
1
+12V_4P 220P 7 VID3 39 30 1 2 Near MOS 4.7U-08 Near TC19,TC22
2
2
VID3 BOOT1 R217 C202 C208 R92 20060222
7 VID2 40
D
D
VID2 2.2 1U-08 10K Q16
7 VID1 1
2
VID1
1 .1U-04 R124 2.2-08 06N03-O Q28
7 VID0 2
30-50mil UG1 G
2
R256 VID0 UG_1 20060221 06N03
3 DACSEL/VID5 UGATE1 31 1 2 G
10K 35 L8 VCORE
S
S
PGOOD CK-0.6UH-SQ
6 EN_VCORE 37
30-50mil
1 2
ENLL PHASE1
PHASE1 29 1 2 0.8V~1.55V/80A
1
> 0.63V
R259 R99 20051124
D
D
1K 20060221 32 1 2 Q24 Q34 2.2
R266 C229 ISEN1 R226 1.8K-1 R152 0-08 2SK3919 2SK3919
30-50mil LG1
2
1 2
10K 5600P 34 LG_1 1 2 G G
LGATE1
1 2 2 1 8
S
S
COMP C101
B to 1.0(12/23)
C230 2 1 56P 4700P
2
9 FB +12V_4P 20050922 VIN
R267
1 2 1K
1
VCORE 10 24
VDIFF PVCC2 MC1
1 2 1 2
1
1
C249 R268 26 1 2 4.7U-08
2
BOOT2
1
560P-O 750-O R214 C203 C212 R96
D
D
R241 2.2 1U-08 10K 20060222
2
100 .1U-04 R134 2.2-08 Q29 Q18
30-50mil UG2 G
C C
2
27 UG_2 20060221 1 2 06N03G 06N03-O
2
UGATE2 L9
7 CPU_COREFB+ 12
S
S
VSEN
1
CK-0.6UH-SQ
C218 28 30-50mil PHASE2 1 2
PHASE2
1
7 CPU_COREFB- 1000P-O 11
2
RGND R100 20051124
D
D
1
VCC 25 1 2 Q35 Q25 2.2
R249 ISEN2 R215 1.8K-1 R150 0-08 2SK3919 2SK3919
1 2 6
30-50mil LG2 G
1 2
OFST
1
100 R265 23 LG_2 1 2 G 20050922
0-O R270 LGATE2
S
S
2
20K C102
4700P
2
2
VIN
36 FS
1
+12V_4P 20050922
R247 5 REF
1
1
150K 18
C227 PVCC3 MC3
2
1
1
.01U 21 1 2 4.7U-08
2
2
BOOT3 R218 C205 C204 R91 20060222
D
D
4 2.2 1U-08 10K Q17
2
20051004 VRM10 .1U-04 R135 2.2-08 06N03-O Q30
30-50mil UG3 G
2
R246 1 2 1.5K 13 20 UG_3 20060221 1 2 G 06N03
OCSET UGATE3 L10
S
S
CK-0.6UH-SQ
14 22
30-50mil PHASE3 1 2
20051004 ICOMP PHASE3
1
R238 0 R228 30K 20051124
D
D
B B
1 2 1 2 15 19 1 2 Q26 Q33 R101
ISUM ISEN3 R223 1.8K-1 R141 0-08 2SK3919 2SK3919 2.2
30-50mil LG3 G
GND
2
RT1 16 17 LG_3 1 2 G
2
IREF LGATE3
Place RT2 1 2 1 R232 2 C213
S
S
close to L3. 10KT-O 0-O .01U
1
41
1
VID Codes Bottom Pad Connect To C103
1 2 GND Through 10 vias. 4700P
2
VID[4:0] VCC_CORE VID[4:0] VCC_CORE
C215
.022U
00000 1.550 10000 1.150 R213 1 2 120K PHASE1
R224 1 2 120K PHASE2
00001 1.525 10001 1.125 R230 1 2 120K PHASE3
00010 1.500 10010 1.100 20051004
00011 1.475 10011 1.075
00100 1.450 10100 1.050
00101 1.425 10101 1.025
20051124
00110 1.400 10110 1.000 +12V_4P VIN
1 2
00111 1.375 10111 0.975
1
1
1
1
L7 TC5 TC6 TC4 TC44
01000 1.350 11000 0.950 0.9UH
2
2
2
2
A 01001 1.325 11001 0.925 1500U/16V 1500U/16V 1500U/16V 1500U/16V A
01010 1.300 11010 0.900
VCORE
01011 1.275 11011 0.875
Elitegroup Computer Systems
1
1
1
1
1
1
1
1
01100 1.250 11100 0.850
TC17 TC22 TC23 TC16 TC18 TC19 TC21 TC20
01101 1.225 11101 0.825 1500U/6.3V-RLX 1500U/6.3V-RLX 1500U/6.3V-RLX 1500U/6.3V-RLX 1500U/6.3V-RLX 1500U/6.3V-RLX 1500U/6.3V-RLX 1500U/6.3V-RLX Title
2
2
2
2
2
2
2
2
01110 1.200 11110 0.800 Power (CPU Vcore)
Size Document Number Rev
Custom
01111 1.175 11111 No CPU RS485M-M 1.0
Date: Friday, April 07, 2006 Sheet 4 of 35
5 4 3 2 1
5 4 3 2 1
Status Target Super I/O VCC3 R512 VREF25
F/GXS 220
AC plug 5V_DUAL=0 SIO_S4S5=O.D=1 1 2
C
S0,S1 5V_DUAL=VCC SIO_S4S5=1
VCC 5V_DUAL E
S3 5V_DUAL=5VSB SIO_S4S5=0 R94 1 2 0-08-O C482
R85 1 2 0-08-O .1U-04 D18
S4,S5 5V_DUAL=5VSB SIO_S4S5=0 LM431
B
S4,S5 5V_DUAL=0 SIO_S4S5=1 FOR FRONT
* VCC 5V_DUAL 20050923
20050922 R307 1 2 0-08-O
R294 1 2 0-08-O 20051122
D FOR REAR CONN D
5VSB 5VSB
VCC25A
1
R305
1K R306
20060221
5V_DUAL 20050923
+12V VCC3
E
4.7K-04 6 EN_VCC25A 20050923
2
24 SIO_S4S5 B Q46
D
4
20050923 2N3906 VREF25 R509 U23A
3VSB 1 2 3 Q38
C
5VSB U15 +
3VSB 1 G 2N7002
Q45 5V_DUAL 10K 2
S
-
S IN OUT D Near CPU.
5VSB +12V 1 2 G2 4 G2 D2 5
D2 LM324
11
1
1
1
1
MC4 TC35 TC37 5VSB P
100U/16V-O ER23 100U/16V R304 S2 3 S2 D2 D2 VCC25A
10K 6
2
1U-O G 110-1 1 2
2
2
2
ADJ R303 R118 G1 2 G1 D1 D1
7 30mil
1 2
1
1
4.7K-04 1K VCC R494 TC24
20060221 N D1 D1
AMS1086 S1 1 S1 8 R495 0
1
ER24 DUALSW 10K-O 100 FOR 2.525V
2
TO-223 & TO-252 CO-LAY 180-1 APM4500 100U/16V
D
D
2
Vo=1.25(1+Rb/Rt) 20051003
2
AMS1086(SOT223)=1.5A Q48 Q47
G 2N7002 G 2N7002 VCC
6,29 ATX_PWRGD
S D
1.8VSB
DS
S
5VSB U12 1.8VSB CHANGE TO 1.2VSB FOR SB600.
Q49 Q27
G
C I O G 2N7002 20N03 C
IN OUT 21,24 -OFFPWRS3
S
1
1
MC5
1
ER20 TC34
1U A 124-1 100U/16V
2
ADJ
2
2
EZ1117-S
ER21
Vo=1.25(1+Rb/Rt) 54.9-1-04 20060221
5VSB+12V 5VDUAL_IN
V_DIMM
20051011
DDRVTT
2
2
1
2
R497 D17
3VSB 10-O BAT54C L15
U20 ER26 FBX2
1
RT9173 10K-1-04
3
8 1 VTT_DDR 5VSB
Vcntl VIN 20060221
7 2 C430
1
Vcntl GND DDRREF R499
6 Vcntl REFEN 3
5 Vcntl VOUT 4 2 1
2
1
24K-O
G
G
G
G
G
D16 EC12
.1U-04
1
1
1
B 20060221 B
ER27 EC8 BAT54C 1000U/6.3V
10
9
11
12
13
1
1
5
EC10 MC7 10K-1-04 EC7 U21 C454
D
100U/16V-O 1U 3 1 20060221 10U-08
VCC
2
2
3
2
20060221 GND BOOT C453 .1U-04 Q53
1000U/6.3V-O
2
2
1000U/6.3V
UGATE 2 1 R486 2 G 20N03
0 L14 V_DIMM
S
8 4.0UH
20060221
R465
200-04
COMP/OCSET
PHASE
7 2 R490 1
1 2
V_DIMM
2
30K
6 4 R483
D
FB LGATE
2.2 20060221
RT9214 Q52
1 1
24 SIO_GP20 1 R485 2 1 R480 2 G 20N03
5VDUAL_IN 4.02K-1 0
S
C460
1 2 1 R484 2 .01U
2
R488 0-08-O 24 SIO_GP21 2K
1 2 C427
R489 0-08-O Q57 1 2 1 2
SI2301S R464 1K-O 4700P-O
SIO_GP20 SIO_GP21 V_DIMM
VCC S D D S 5VSB
Q54 45N02 1 1 Normal 1 2
0 1 +50mV R463 249-1
1 0 +100mV
G
G
1
1
1
0 0 +150mV 5VSB
EC6 EC9 EC11
2
2
2
A DUALSW 1 2 R496 A
D
4.7K-04 1000U/6.3V 20051003 1000U/6.3V 1000U/6.3V
2
R501 20060221 Q56
10K R505 G 2N7002
20K
C
S
Elitegroup Computer Systems
1
2 1 B
21,29 -OFFPWRS4_S5 R491 22K Q55
2 1 2N3904 Title
6 -SUSC_S5
E
R583 22K-O
Power A(DC to DC)
20051122 Size Document Number Rev
Custom
RS485M-M 1.0
Date: Friday, April 07, 2006 Sheet 5 of 35
5 4 3 2 1
5 4 3 2 1
20060221 V_DIMM
5VSB VREF25
+12V 5A 2.25A
20060623
2
1
R657 R658 TC36 VCC_NB 1.2V VCC1.2
D
VCC1.8 4.7K-04 10.5K-1 C289 D
C
D
2
8
U26A Q64 1000U/6.3V 4.7U-08
1
B 3 2SK3570
+
Q63 1 G
D
2
1
2N3904 2 VCC_NB VCC1.2
R659
E
S
-
VCC3 Q65 R660 C547 L11
VREF25 EN_VCC12 G 2N7002 10K-1 1U LM358
2
4
FBX2
S
1
+12V 20060221
D
4.7K-04
1
20050923
1
1
R511 20060331 Q66
VREF18 1.4K-1 20060623 G 2SK3570 TC30 TC31
D
4
U23B 1000U/6.3V 1000U/6.3V
S
2
2
2
1
Q40 5
+
2SK3570 G 7 TC28
1
6 1000U/6.3V-O
S
2
-
R510
LM324 3.6K-1
11
2
VCC1.8
20060223
8
U26B
80 mil 5 +
7
1
6 -
TC27 For VCC3 vs VCC1.8 power seq.
1000U/6.3V LM358
2
4
C C
5VSB 5VSB 5VSB
20060221
R434 U19A U19B 20060221 SB_PWRGD is 35mS
14
14
4.7K-04 20051122 R415 after NB_PWRGD.
4.7K-04
ASIC_CPUPWRGD 1 2 1 2 3 4 SB_PWRGD 21
1
R584
0 C523 74HCT14 74HCT14 R416 C398
K8 Power Sequence
7
7
10U-08-O 8.2K-04 .1U-04-O
2
VCC25A 20060221
5VSB 5VSB 5VSB 5VSB 5VSB
V_DIMM VCC1.2 MC6
1 2
1
1
1
1
10U-08 Should keep these two invertor for
R329 R330 R328 R327 20051122
16
making SB_PWRGD rising-edge faster.
U17 1K-O 1K 1K-O 1K
5VSB
2
2
2
2
1 13 EN_VCORE
4,21 PG_VCORE VCORE_GD VCORE_EN -SUSC_S5 EN_VCORE 4
2 VLDT_12 VDIMM_STR_EN 12 -SUSC_S5 5
3 14 EN_VCC25A
B VDDA_25 VDDA_EN EN_VCC12 EN_VCC25A 5 B
4 VDIMM_STR VLDT_EN 15
5VSB
ATX_PSON# 9 -ATX_PSON 29
1
7 ASIC_CPUPWRGD ASIC_CPUPWRGD 11 7
R349 CPU_PWRGD ATX_PWRGD ATX_PWRGD 5,29
10K 1 2 3VSB R395
R331 1K-O 20051122 0-O 20050926
2
24 -ATX_PSON_SIO 5 SB_PSON# RSTBTN# 10 -HW_RST 21,24,29 1 2
6 20060221
GND
21 S3_STATE ACPI_S3
As GPO pin:Need 5VSB VCC 5VSB 5VSB
BIOS programming. IT8282M
8
R407 R585 U19C U19D 20060221
14
14
20060221 4.7K-04 4.7K-04-O R404
4.7K-04
ASIC_CPUPWRGD 1 2 AND_ASICGD 5 6 9 8
R399 NB_PWRGD 17
0
1
Unused 74HCT14 74HCT14 R410 C166
7
7
C395 8.2K-04 .1U-04-O
20060221 10U-08-O
2
5VSB 20060221
U19E
14
A A
11 10
74HCT14
Elitegroup Computer Systems
7
Title
Power B(DC to DC),PWR Sequence&good
Size Document Number Rev
Custom
RS485M-M 1.0
Date: Friday, April 07, 2006 Sheet 6 of 35
5 4 3 2 1
A B C D E
20060209
DEL R586,R588,R587,R589,R590.
ATHLON Control and Debug Required for compatibility
with future processors
3VSB 20050927
V_DIMM C154
LAYOUT: Route VDDA trace approx. .1U-04-O
50 mils wide (use 2x25 mil traces to
exit ball field) and 500 mils long. 3VSB
VCC25A FB44 R234 R240 R206
FB120 300 300 300
4 CPU1D 4
C10 AK7 CPU_THERMTRIP_L R169
VDDA2 THERMTRIP_L CPU_PROCHOT_L_1.8 20060209 4.7K-04 20060221
D10 VDDA1 PROCHOT_L AL7
C210 20060215 R653 300-04-O
C221 C214 CPU_HT_RESET- C7 DEL U8.
RESET_L -CPU_THERMTRIP 21
4.7U-08 .22U 3300P-04 V_DIMM R225 300-04 CPU_ALL_PWROK C9
R231 300-04 CPU_LDTSTOP- PWROK
D8 LDTSTOP_L
20060215 D2 CPU_VID5
VID5 STP6
R654 0-04-O AL6 D1 CPU_VID4
20 CPU_SIC SIC VID4 VID4 4
R655 0-04-O AK6 C1 CPU_VID3
20051220 20 CPU_SID SID VID3 VID3 4
E3 CPU_VID2
VID2 VID2 4
R227 44.2-1-04 CPU_HTREF1 V8 CPU_VID1
Keep trace to resistors VCC1.2 R205 44.2-1-04 CPU_HTREF0 V7 HT_REF1 VID1 E2
E1 CPU_VID0
VID1 4
HT_REF0 VID0 VID0 4
less than 1" from CPU pin
AL3 CPU_PRESENT-
3VSB CPU_VDD_RUN_FB_P CPU_PRESENT_L
4 CPU_COREFB+ G2 VDD_FB_H
4 CPU_COREFB- CPU_VDD_RUN_FB_N G1 F1 CPU_PSI-
VDD_FB_L PSI_L STP7
CPU_VDDIO_SUS_FB_P AK11 H3
C128 C207 CPU_VDDIO_SUS_FB_N AL11 VDDIO_FB_H NC#1
VDDIO_FB_L NC#2 H4
.1U-04-O 3900P-04 H20
CPU_CLKIN_SC_P NC#3
14
3 CPUCLK A8 CLKIN_H NC#4 H21
U7A CPU_CLKIN_SC_N B8
20050927 CLKIN_L
1 2 R212 CPU_DBRDY B6 A5 CPU_DBREQ-
C199 169-1-04 DBRDY DBREQ_L
U7C 3900P-04 CPU_TMS AL9
CPU_TCK TMS CPU_TDO
74LVC07A 3 CPUCLK- AH10 AK10
7
CPU_TRST- TCK TDO
3 5 6 AJ10 TRST_L 3
CPU_TDI AL10
U7B TDI
Keep trace to resistor CPU_TEST25_H_BYPASSCLK_P C11 CPU_TEST29_H_FBCLKOUT_P R243 80.6-1-04
3 4
74LVC07A
less than 1.25" from CPU pin CPU_TEST25_H_BYPASSCLK_N
A10
B10
TEST25_H TEST29_H
D11 CPU_TEST29_L_FBCLKOUT_N
Route as 80-Ohm
TEST25_L TEST29_L
R219 300-04 F10 TEST19 NC#5 AE7 differential impedance
R221 300-04 E9 AD19
74LVC07A AJ7
TEST18
TEST13
NC#6
NC#7 AE8 Keep trace to resistor
F6 TEST9 NC#8 AD18 less than 1" from CPU pin
STP22 CPU_TEST17_BP3 D6 AK8 CPU_TEST24_SCANCLK1
TEST17 TEST24 TP25
STP27 CPU_TEST16_BP2 E7 AH8 CPU_TEST23_TSTUPD
FOR SB600 TEST16 TEST23 STP34
TP15 CPU_TEST15_BP1 F8 AJ9 CPU_TEST22_SCANSHIFTEN
20060331 20050926 TEST15 TEST22 TP29 20050926
STP15 CPU_TEST14_BP0 C5 AL8 CPU_TEST21_SCANEN
TEST14 TEST21 TP27
R668 0-04-O CPU_ALL_PWROK TP50 CPU_TEST12_SCANSHIFTENB AH9 AJ8 CPU_TEST20_SCANCLK2
20 SB_CPUPWRGD TEST12 TEST20 STP21
R669 0-04-O CPU_LDTSTOP- STP16 CPU_TEST07_ANALOG_T E5 J10 CPU_TEST28_H_PLLCHRZ_P
17,20,21 LDT_STOP- TEST7 TEST28_H STP37
STP19 CPU_TEST6_DIECRACKMON AJ5 H9 CPU_TEST28_L_PLLCHRZ_N
TEST6 TEST28_L STP33
R670 0-04-O CPU_HT_RESET- CPU_TEST5_THERMDC AG9 AK9 CPU_TEST27_SINGLECHAIN V_DIMM
20 LDT_RST- 24 CPU_THERMDC TEST5 TEST27 STP35
CPU_TEST4_THERMDA AG8 AK5 CPU_TEST26_BURNIN- VCC25A
V_DIMM 24 CPU_THERMDA TEST4 TEST26
STP29 CPU_TEST3_GATE0 AH7 G7 CPU_TEST10_ANALOGOUT R237 300-04
TEST3 TEST10 STP28
STP23 CPU_TEST2_DRAIN0 AJ6 D4 CPU_TEST08_DIG_T
VCC3 TEST2 TEST8 STP12 TP66
STP43 CPU_RSVD_MA_CKE3 L25 E20 CPU_MA_RESET- CPUCLK
RSVD0 RSVD22 STP40 TP10
STP46 CPU_RSVD_MA_CKE2 L26 B19 CPU_MB_RESET- CPUCLK-
RSVD1 RSVD23 STP41 TP11
R170 R172 R174 STP55 CPU_RSVD_MB_CKE3 L31
R171 R173 300 300 300 STP50 CPU_RSVD_MB_CKE2 RSVD2 CPU_RSVD1 CPU_VDD_RUN_FB_P
L30 RSVD3 RSVD24 AL4 STP14 TP26
1K 1K U7D AK4 CPU_RSVD2 CPU_VDD_RUN_FB_N
RSVD25 STP20 TP30
STP48 CPU_RSVD_MA1_CLK3_P W26 AK3 CPU_RSVD3
RSVD4 RSVD26 STP11
8CPU_ALL_PWROK STP45 CPU_RSVD_MA1_CLK3_N CPU_TEST29_H_FBCLKOUT_P
MISC
20 SB_CPUPWRGD 9 W25 RSVD5 TP28
2
STP47 CPU_RSVD_MA1_ODT1 AE27 F2 CPU_RSVD_VIDSTRB1 CPU_TEST29_L_FBCLKOUT_N 2
RSVD6 RSVD27 STP8 TP16
6 ASIC_CPUPWRGD N P R671 22K-04-O STP42 CPU_RSVD_MA0_CLK3_P U24 F3 CPU_RSVD_VIDSTRB0
20060331 RSVD7 RSVD28 STP9
D8 1N4148-S 74LVC07A STP44 CPU_RSVD_MA0_CLK3_N V24 CPU_VDDIO_SUS_FB_P
FOR SB600 RSVD8 STP38
STP49 CPU_RSVD_MA0_ODT1 AE28 G4 CPU_RSVD_VDDNB_FB_P CPU_VDDIO_SUS_FB_N
U7E RSVD9 RSVD29 STP13 STP36
V_DIMM G3 CPU_RSVD_VDDNB_FB_N
RSVD30 STP10
AD25 G5 CPU_RSVD_CORE_TYPE CPU_ALL_PWROK
RSVD10 RSVD31 STP17 STP30
11 10 CPU_LDTSTOP- AE24
17,20,21 LDT_STOP- RSVD11
AE25 CPU_LDTSTOP-
RSVD12 STP32
R672 22K-04-O R222 AJ18 Y31 CPU_RSVD_MB1_CLK3_P
RSVD13 RSVD32 STP54
B CPU_PH_G
74LVC07A 20060331 10K AJ20 Y30 CPU_RSVD_MB1_CLK3_N CPU_HT_RESET-
FOR SB600 3VSB RSVD14 RSVD33 STP51 STP26
VCC3 R591 1K C18 AG31 CPU_RSVD_MB1_ODT1
U7F RSVD15 RSVD34 STP56
C20 V31 CPU_RSVD_MB0_CLK3_P -CPU_THERMTRIP
20051122 RSVD16 RSVD35 STP53 STP67
G24 W31 CPU_RSVD_MB0_CLK3_N
RSVD17 RSVD36 STP52 20050922
13 12 CPU_HT_RESET- G25 AF31 CPU_RSVD_MB0_ODT1
20 LDT_RST- RSVD18 RSVD37 STP57
R236 H25 V_DIMM
R673 22K-04-O 4.7K-04 20060221 RSVD19
V29 RSVD20
74LVC07A 20060331 FOR SB600 W30
CPU_PROCHOT_L_1.8 RSVD21 CPU_PRESENT- R216 1K
E C -CPU_PROCHOT 21
CPU_TEST25_H_BYPASSCLK_P R233 510
Q39 AMD NPT M2 SOCKET 20050926
V_DIMM
HDT Connector 2N3904
220-04-O
220-04-O
220-04-O
Processor Socket CPU_TEST21_SCANEN R242 300-04
220-04-O
220-04-O
CPU_TEST20_SCANCLK2 R235 330-04-O
V_DIMM CPU_TEST24_SCANCLK1 R239 330-04-O
J1 VCC3 CPU_TEST22_SCANSHIFTEN R244 330-04-O
1 2 CPU_TEST12_SCANSHIFTENB R248 330-04-O
3 4 CPU_TEST15_BP1 R211 330-04-O
5 6 20051122 CPU_TEST14_BP0 R210 330-04-O
R257
R251
R250
R252
R209
CPU_DBREQ- 7 8 R592
-CPU_THERMTRIP 21
CPU_DBRDY 9 10 4.7K-04 20060221 CPU_TEST25_H_BYPASSCLK_N R229 510
C
1 1
CPU_TCK 11 12
CPU_TMS 13 14 B Q59
CPU_TDI 15 16 2N3904
C
CPU_TRST- 17 18 R593
E
CPU_TDO 19 20 CPU_THERMTRIP_L B Q60 1K
21 22 20050926 2N3904 Elitegroup Computer System
23 24 CPU_HT_RESET- R594
E
26 1K Title
KEY
NOTE: HDT termination is required M2 HT I/F ,CTRL & DEBUG PART1
for Rev Ax silicon only. ASP-68200-07-O Size Document Number Rev
C 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 7 of 35
A B C D E
A B C D E
CPU HyperTransport Interface
VDDLDTRUNCPU is connected to the VDD_LDT_RUN power
supply through the package or on the die. It is only connected
on the board to decoupling near the CPU package.
4 4
VCC1.2
CPU1A
AJ4 H6 VLDT_B
VLDT_06 VLDT_08
AJ3 VLDT_05 VLDT_07 H5
AJ2 H2 C189
VLDT_02 VLDT_04 4.7U-08
AJ1 VLDT_01 VLDT_03 H1
VCC1.2
15 HT_CADIN15_P U6 L0_CADIN_H15 L0_CADOUT_H15 Y5 HT_CADOUT15_P 15
15 HT_CADIN15_N V6 L0_CADIN_L15 L0_CADOUT_L15 Y4 HT_CADOUT15_N 15
T4 AB6 C198 C201 C195 C197
15 HT_CADIN14_P L0_CADIN_H14 L0_CADOUT_H14 HT_CADOUT14_P 15
T5 AA6 C194 C196
15 HT_CADIN14_N L0_CADIN_L14 L0_CADOUT_L14 HT_CADOUT14_N 15
R6 AB5 4.7U-08 4.7U-08 .22U .22U 10P-04 10P-04
15 HT_CADIN13_P L0_CADIN_H13 L0_CADOUT_H13 HT_CADOUT13_P 15
15 HT_CADIN13_N T6 L0_CADIN_L13 L0_CADOUT_L13 AB4 HT_CADOUT13_N 15
15 HT_CADIN12_P P4 L0_CADIN_H12 L0_CADOUT_H12 AD6 HT_CADOUT12_P 15
15 HT_CADIN12_N P5 L0_CADIN_L12 L0_CADOUT_L12 AC6 HT_CADOUT12_N 15
15 HT_CADIN11_P M4 L0_CADIN_H11 L0_CADOUT_H11 AF6 HT_CADOUT11_P 15
15 HT_CADIN11_N M5 L0_CADIN_L11 L0_CADOUT_L11 AE6 HT_CADOUT11_N 15
15 HT_CADIN10_P L6 L0_CADIN_H10 L0_CADOUT_H10 AF5 HT_CADOUT10_P 15
15 HT_CADIN10_N M6 L0_CADIN_L10 L0_CADOUT_L10 AF4 HT_CADOUT10_N 15
15 HT_CADIN9_P K4 L0_CADIN_H9 L0_CADOUT_H9 AH6 HT_CADOUT9_P 15
15 HT_CADIN9_N K5 L0_CADIN_L9 L0_CADOUT_L9 AG6 HT_CADOUT9_N 15
15 HT_CADIN8_P J6 L0_CADIN_H8 L0_CADOUT_H8 AH5 HT_CADOUT8_P 15
15 HT_CADIN8_N K6 L0_CADIN_L8 L0_CADOUT_L8 AH4 HT_CADOUT8_N 15
HT LINK
3
15 HT_CADIN7_P U3 L0_CADIN_H7 L0_CADOUT_H7 Y1 HT_CADOUT7_P 15 3
15 HT_CADIN7_N U2 L0_CADIN_L7 L0_CADOUT_L7 W1 HT_CADOUT7_N 15
15 HT_CADIN6_P R1 L0_CADIN_H6 L0_CADOUT_H6 AA2 HT_CADOUT6_P 15
15 HT_CADIN6_N T1 L0_CADIN_L6 L0_CADOUT_L6 AA3 HT_CADOUT6_N 15
15 HT_CADIN5_P R3 L0_CADIN_H5 L0_CADOUT_H5 AB1 HT_CADOUT5_P 15
15 HT_CADIN5_N R2 L0_CADIN_L5 L0_CADOUT_L5 AA1 HT_CADOUT5_N 15
15 HT_CADIN4_P N1 L0_CADIN_H4 L0_CADOUT_H4 AC2 HT_CADOUT4_P 15
15 HT_CADIN4_N P1 L0_CADIN_L4 L0_CADOUT_L4 AC3 HT_CADOUT4_N 15
15 HT_CADIN3_P L1 L0_CADIN_H3 L0_CADOUT_H3 AE2 HT_CADOUT3_P 15
15 HT_CADIN3_N M1 L0_CADIN_L3 L0_CADOUT_L3 AE3 HT_CADOUT3_N 15
15 HT_CADIN2_P L3 L0_CADIN_H2 L0_CADOUT_H2 AF1 HT_CADOUT2_P 15
15 HT_CADIN2_N L2 L0_CADIN_L2 L0_CADOUT_L2 AE1 HT_CADOUT2_N 15
15 HT_CADIN1_P J1 L0_CADIN_H1 L0_CADOUT_H1 AG2 HT_CADOUT1_P 15
15 HT_CADIN1_N K1 L0_CADIN_L1 L0_CADOUT_L1 AG3 HT_CADOUT1_N 15
15 HT_CADIN0_P J3 L0_CADIN_H0 L0_CADOUT_H0 AH1 HT_CADOUT0_P 15
15 HT_CADIN0_N J2 L0_CADIN_L0 L0_CADOUT_L0 AG1 HT_CADOUT0_N 15
15 HT_CLKIN1_P N6 L0_CLKIN_H1 L0_CLKOUT_H1 AD5 HT_CLKOUT1_P 15
15 HT_CLKIN1_N P6 L0_CLKIN_L1 L0_CLKOUT_L1 AD4 HT_CLKOUT1_N 15
VCC1.2 N3 AD1
15 HT_CLKIN0_P L0_CLKIN_H0 L0_CLKOUT_H0 HT_CLKOUT0_P 15
15 HT_CLKIN0_N N2 L0_CLKIN_L0 L0_CLKOUT_L0 AC1 HT_CLKOUT0_N 15
R220 49.9-1-04 V4 Y6 HT_CPU_CTLOUT1_P
L0_CTLIN_H1 L0_CTLOUT_H1 STP24
R204 49.9-1-04 V5 W6 HT_CPU_CTLOUT1_N
L0_CTLIN_L1 L0_CTLOUT_L1 STP18
15 HT_CTLIN0_P U1 L0_CTLIN_H0 L0_CTLOUT_H0 W2 HT_CTLOUT0_P 15
15 HT_CTLIN0_N V1 L0_CTLIN_L0 L0_CTLOUT_L0 W3 HT_CTLOUT0_N 15
2 2
DHOLE1 DHOLE1
DHOLE2 DHOLE2
20051006 DHOLE3 DHOLE3
DHOLE4 DHOLE4
MT1 MT1 MT17 MT17
MT2 MT2 MT18 MT18
MT3 MT3 MT19 MT19
MT4 MT4 MT20 MT20
MT5 MT5 MT21 MT21
MT6 MT6 MT22 MT22
MT7 MT7 MT23 MT23
MT8 MT8 MT24 MT24
MT9 MT9 MT25 MT25
MT10 MT10 MT26 MT26
MT11 MT11 MT27 MT27
MT12 MT12 MT28 MT28
MT13 MT13 MT29 MT29
MT14 MT14 MT30 MT30
MT15 MT15 MT31 MT31
MT16 MT16 MT32 MT32
Athlon 64 M2
20051109 Processor Socket 20051109
1 1
Elitegroup Computer System
Title
M2 HT I/F,CTRL & DEBUG PART2
Size Document Number Rev
C 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 8 of 35
A B C D E
A B C D E
Processor DDR2 Memory Interface VDD_VTT_SUS_CPU is connected to the VDD_VTT_SUS power
CPU1C
supply through the package or on the die. It is only connected
12 MEM_MB_DATA[63..0]
MEM_MB_DATA63AH13
MB_DATA63 MA_DATA63 AE14 MEM_MA_DATA63 MEM_MA_DATA[63..0] 11
on the board to decoupling near the CPU package.
MEM_MB_DATA62 AL13 AG14 MEM_MA_DATA62
MEM_MB_DATA61 AL15 MB_DATA62 MA_DATA62 VTT_DDR
MB_DATA61 MA_DATA61 AG16 MEM_MA_DATA61
MEM_MB_DATA60 AJ15 CPU1B
MB_DATA60 MA_DATA60 AD17 MEM_MA_DATA60
MEM_MB_DATA59 AF13 AD13 MEM_MA_DATA59 D12
MEM_MB_DATA58AG13 MB_DATA59 MA_DATA59 VTT1
MB_DATA58 MA_DATA58 AE13 MEM_MA_DATA58 C12 VTT2 MA1_CLK_H2 AE20 MEM_MA1_CLK2_P 11,14
MEM_MB_DATA57 AL14 AG15 MEM_MA_DATA57 VTT_DDR B12 AE19
MB_DATA57 MA_DATA57 VTT3 MA1_CLK_L2 MEM_MA1_CLK2_N 11,14
MEM_MB_DATA56AK15 AE16 MEM_MA_DATA56 A12 G20
MB_DATA56 MA_DATA56 VTT4 MA1_CLK_H1 MEM_MA1_CLK1_P 11,14
MEM_MB_DATA55 AL16 AG17 MEM_MA_DATA55 AK12 G21
MB_DATA55 MA_DATA55 VTT5 MA1_CLK_L1 MEM_MA1_CLK1_N 11,14
4
MEM_MB_DATA54 AL17 AE18 MEM_MA_DATA54 AJ12 V27 4
MB_DATA54 MA_DATA54 VTT6 MA1_CLK_H0 MEM_MA1_CLK0_P 11,14
MEM_MB_DATA53AK21 AD21 MEM_MA_DATA53 AH12 W27
MB_DATA53 MA_DATA53 CPU_M_VREF_SUS VTT7 MA1_CLK_L0 MEM_MA1_CLK0_N 11,14
MEM_MB_DATA52 AL21 AG22 MEM_MA_DATA52 V_DIMM AG12 AG21
MB_DATA52 MA_DATA52 VTT8 MA0_CLK_H2 MEM_MA0_CLK2_P 11,14
MEM_MB_DATA51AH15 AE17 MEM_MA_DATA51 AL12 AG20
MB_DATA51 MA_DATA51 VTT9 MA0_CLK_L2 MEM_MA0_CLK2_N 11,14
MEM_MB_DATA50 AJ16 AF17 MEM_MA_DATA50 G19
MB_DATA50 MA_DATA50 MA0_CLK_H1 MEM_MA0_CLK1_P 11,14
MEM_MB_DATA49AH19 AF21 MEM_MA_DATA49 F12 H19
MB_DATA49 MA_DATA49 MEMVREF MA0_CLK_L1 MEM_MA0_CLK1_N 11,14
MEM_MB_DATA48 AL20 AE21 MEM_MA_DATA48 R253 U27
MB_DATA48 MA_DATA48 AMD USE 39.2 OHM MA0_CLK_H0 MEM_MA0_CLK0_P 11,14
MEM_MB_DATA47 AJ22 AF23 MEM_MA_DATA47 40.2-1 STP39 CPU_VTT_SUS_SENSE E12 U26
MB_DATA47 MA_DATA47 VTT_SENSE MA0_CLK_L0 MEM_MA0_CLK0_N 11,14
DDRII: DATA
MEM_MB_DATA46 AL22 AE23 MEM_MA_DATA46
MEM_MB_DATA45 AL24 MB_DATA46 MA_DATA46
MB_DATA45 MA_DATA45 AJ26 MEM_MA_DATA45 Keep trace to resistors M_ZN AH11 MEMZN MB1_CLK_H2 AL19 MEM_MB1_CLK2_P 12,14
MEM_MB_DATA44AK25 AG26 MEM_MA_DATA44 M_ZP AJ11 AL18
MB_DATA44 MA_DATA44 MEMZP MB1_CLK_L2 MEM_MB1_CLK2_N 12,14
MEM_MB_DATA43 AJ21 AE22 MEM_MA_DATA43 less than 1" from CPU pin C19 MEM_MB1_CLK1_P 12,14
DDR II: CMD/CTRL/CLK
MEM_MB_DATA42AH21 MB_DATA43 MA_DATA43 MB1_CLK_H1
MB_DATA42 MA_DATA42 AG23 MEM_MA_DATA42 11,14 MEM_MA1_CS_L1 AD27 MA1_CS_L1 MB1_CLK_L1 D19 MEM_MB1_CLK1_N 12,14
MEM_MB_DATA41AH23 AH25 MEM_MA_DATA41 AA25 W29
MB_DATA41 MA_DATA41 11,14 MEM_MA1_CS_L0 MA1_CS_L0 MB1_CLK_H0 MEM_MB1_CLK0_P 12,14
MEM_MB_DATA40 AJ24 AF25 MEM_MA_DATA40 R258 AC25 W28
MB_DATA40 MA_DATA40 AMD USE 39.2 OHM 11,14 MEM_MA0_CS_L1 MA0_CS_L1 MB1_CLK_L0 MEM_MB1_CLK0_N 12,14
MEM_MB_DATA39 AL27 AJ28 MEM_MA_DATA39 40.2-1 AA24 AJ19
MB_DATA39 MA_DATA39 11,14 MEM_MA0_CS_L0 MA0_CS_L0 MB0_CLK_H2 MEM_MB0_CLK2_P 12,14
MEM_MB_DATA38AK27 AJ29 MEM_MA_DATA38 AK19
MB_DATA38 MA_DATA38 MB0_CLK_L2 MEM_MB0_CLK2_N 12,14
MEM_MB_DATA37AH31 AF29 MEM_MA_DATA37 AE29 A18
MB_DATA37 MA_DATA37 12,14 MEM_MB1_CS_L1 MB1_CS_L1 MB0_CLK_H1 MEM_MB0_CLK1_P 12,14
MEM_MB_DATA36AG30 AE26 MEM_MA_DATA36 AB31 A19
MB_DATA36 MA_DATA36 12,14 MEM_MB1_CS_L0 MB1_CS_L0 MB0_CLK_L1 MEM_MB0_CLK1_N 12,14
MEM_MB_DATA35 AL25 AJ27 MEM_MA_DATA35 AE30 U31
MB_DATA35 MA_DATA35 12,14 MEM_MB0_CS_L1 MB0_CS_L1 MB0_CLK_H0 MEM_MB0_CLK0_P 12,14
MEM_MB_DATA34 AL26 AH27 MEM_MA_DATA34 AC31 U30
MB_DATA34 MA_DATA34 12,14 MEM_MB0_CS_L0 MB0_CS_L0 MB0_CLK_L0 MEM_MB0_CLK0_N 12,14
Logical DIMM (DIMM2 and DIMM4).
MEM_MB_DATA33 AJ30 AG29 MEM_MA_DATA33
MB_DATA33 MA_DATA33
To upper DIMM sockets for each
MEM_MB_DATA32 AJ31 AF27 MEM_MA_DATA32 M31 AD31
MB_DATA32 MA_DATA32 12,14 MEM_MB_CKE1 MB_CKE1 MB1_ODT0 MEM_MB1_ODT0 12,14
MEM_MB_DATA31 E31 E29 MEM_MA_DATA31 M29 AD29
MB_DATA31 MA_DATA31 12,14 MEM_MB_CKE0 MB_CKE0 MB0_ODT0 MEM_MB0_ODT0 12,14
MEM_MB_DATA30 E30 E28 MEM_MA_DATA30 L27 AC27
MB_DATA30 MA_DATA30 11,14 MEM_MA_CKE1 MA_CKE1 MA1_ODT0 MEM_MA1_ODT0 11,14
MEM_MB_DATA29 B27 D27 MEM_MA_DATA29 M25 AC28
MB_DATA29 MA_DATA29 11,14 MEM_MA_CKE0 MA_CKE0 MA0_ODT0 MEM_MA0_ODT0 11,14
MEM_MB_DATA28 A27 C27 MEM_MA_DATA28
MEM_MB_DATA27 F29 MB_DATA28 MA_DATA28
MB_DATA27 MA_DATA27 G26 MEM_MA_DATA27 11,14 MEM_MA_ADD[15..0]
MEM_MA_ADD15M27
MA_ADD15 MB_ADD15 N28 MEM_MB_ADD15
MEM_MB_ADD[15..0] 12,14
Logical DIMM (DIMM1 and DIMM3).
MEM_MB_DATA26 F31 F27 MEM_MA_DATA26 MEM_MA_ADD14 N24 N29 MEM_MB_ADD14
3
MEM_MB_DATA25 A29 MB_DATA26 MA_DATA26 MA_ADD14 MB_ADD14 3
MB_DATA25 MA_DATA25 C28 MEM_MA_DATA25 MEM_MA_ADD13
AC26 MA_ADD13 MB_ADD13 AE31 MEM_MB_ADD13
To lower DIMM sockets for each
MEM_MB_DATA24 A28 E27 MEM_MA_DATA24 MEM_MA_ADD12 N26 N30 MEM_MB_ADD12
MEM_MB_DATA23 A25 MB_DATA24 MA_DATA24 MA_ADD12 MB_ADD12
MB_DATA23 MA_DATA23 F25 MEM_MA_DATA23 MEM_MA_ADD11 P25
MA_ADD11 MB_ADD11 P29 MEM_MB_ADD11
MEM_MB_DATA22 A24 E25 MEM_MA_DATA22 MEM_MA_ADD10 Y25 AA29 MEM_MB_ADD10
MEM_MB_DATA21 C22 MB_DATA22 MA_DATA22 MA_ADD10 MB_ADD10
MB_DATA21 MA_DATA21 E23 MEM_MA_DATA21 MEM_MA_ADD9 N27
MA_ADD9 MB_ADD9 P31 MEM_MB_ADD9
MEM_MB_DATA20 D21 D23 MEM_MA_DATA20 MEM_MA_ADD8 R24 R29 MEM_MB_ADD8
MEM_MB_DATA19 A26 MB_DATA20 MA_DATA20 MA_ADD8 MB_ADD8
MB_DATA19 MA_DATA19 E26 MEM_MA_DATA19 MEM_MA_ADD7 P27
MA_ADD7 MB_ADD7 R28 MEM_MB_ADD7
MEM_MB_DATA18 B25 C26 MEM_MA_DATA18 MEM_MA_ADD6 R25 R31 MEM_MB_ADD6
MEM_MB_DATA17 B23 MB_DATA18 MA_DATA18 MA_ADD6 MB_ADD6
MB_DATA17 MA_DATA17 G23 MEM_MA_DATA17 MEM_MA_ADD5 R26
MA_ADD5 MB_ADD5 R30 MEM_MB_ADD5
MEM_MB_DATA16 A22 F23 MEM_MA_DATA16 MEM_MA_ADD4 R27 T31 MEM_MB_ADD4
MEM_MB_DATA15 B21 MB_DATA16 MA_DATA16 MA_ADD4 MB_ADD4
MB_DATA15 MA_DATA15 E22 MEM_MA_DATA15 MEM_MA_ADD3 T25
MA_ADD3 MB_ADD3 T29 MEM_MB_ADD3
MEM_MB_DATA14 A20 E21 MEM_MA_DATA14 MEM_MA_ADD2 U25 U29 MEM_MB_ADD2
MEM_MB_DATA13 C16 MB_DATA14 MA_DATA14 MA_ADD2 MB_ADD2
MB_DATA13 MA_DATA13 F17 MEM_MA_DATA13 MEM_MA_ADD1 T27
MA_ADD1 MB_ADD1 U28 MEM_MB_ADD1
MEM_MB_DATA12 D15 G17 MEM_MA_DATA12 MEM_MA_ADD0 W24 AA30 MEM_MB_ADD0
MEM_MB_DATA11 C21 MB_DATA12 MA_DATA12 MA_ADD0 MB_ADD0
MB_DATA11 MA_DATA11 G22 MEM_MA_DATA11
MEM_MB_DATA10 A21 F21 MEM_MA_DATA10 N25 N31
MB_DATA10 MA_DATA10 11,14 MEM_MA_BANK2 MA_BANK2 MB_BANK2 MEM_MB_BANK2 12,14
MEM_MB_DATA9 A17 G18 MEM_MA_DATA9 Y27 AA31
MB_DATA9 MA_DATA9 11,14 MEM_MA_BANK1 MA_BANK1 MB_BANK1 MEM_MB_BANK1 12,14
MEM_MB_DATA8 A16 E17 MEM_MA_DATA8 AA27 AA28
MB_DATA8 MA_DATA8 11,14 MEM_MA_BANK0 MA_BANK0 MB_BANK0 MEM_MB_BANK0 12,14
MEM_MB_DATA7 B15 G16 MEM_MA_DATA7
MEM_MB_DATA6 A14 MB_DATA7 MA_DATA7
MB_DATA6 MA_DATA6 E15 MEM_MA_DATA6 11,14 MEM_MA_RAS- AA26 MA_RAS_L MB_RAS_L AB29 MEM_MB_RAS- 12,14
MEM_MB_DATA5 E13 G13 MEM_MA_DATA5 AB25 AC29
MB_DATA5 MA_DATA5 11,14 MEM_MA_CAS- MA_CAS_L MB_CAS_L MEM_MB_CAS- 12,14
MEM_MB_DATA4 F13 H13 MEM_MA_DATA4 AB27 AC30
MB_DATA4 MA_DATA4 11,14 MEM_MA_WE- MA_WE_L MB_WE_L MEM_MB_WE- 12,14
MEM_MB_DATA3 C15 H17 MEM_MA_DATA3
MEM_MB_DATA2 A15 MB_DATA3 MA_DATA3 Athlon 64 M2
MB_DATA2 MA_DATA2 E16 MEM_MA_DATA2
MEM_MB_DATA1 A13 E14 MEM_MA_DATA1 Processor Socket
MEM_MB_DATA0 D13 MB_DATA1 MA_DATA1
MB_DATA0 MA_DATA0 G14 MEM_MA_DATA0
2
MEM_MB_CHECK7 K29 K25 MEM_MA_CHECK7 2
12 MEM_MB_CHECK[7..0] MB_CHECK7 MA_CHECK7 MEM_MA_CHECK[7..0] 11
MEM_MB_CHECK6 K31 J26 MEM_MA_CHECK6
MEM_MB_CHECK5 G30 MB_CHECK6 MA_CHECK6 MEM_MA_CHECK5
MB_CHECK5 MA_CHECK5 G28
MEM_MB_CHECK4 G29 G27 MEM_MA_CHECK4
MEM_MB_CHECK3 L29 MB_CHECK4 MA_CHECK4 MEM_MA_CHECK3
MB_CHECK3 MA_CHECK3 L24
MEM_MB_CHECK2 L28 K27 MEM_MA_CHECK2
MEM_MB_CHECK1 H31 MB_CHECK2 MA_CHECK2 MEM_MA_CHECK1
H29
MEM_MB_CHECK0 G31 MB_CHECK1
MB_CHECK0
MA_CHECK1
MA_CHECK0 H27 MEM_MA_CHECK0 VDD_VREF_SUS_CPU
MEM_MB_DM8 J29 J25 MEM_MA_DM8
12 MEM_MB_DM[8..0] MB_DM8 MA_DM8 MEM_MA_DM[8..0] 11
MEM_MB_DM7 AJ14 AF15 MEM_MA_DM7 V_DIMM
MEM_MB_DM6 MB_DM7 MA_DM7
AH17 MB_DM6 MA_DM6 AF19 MEM_MA_DM6
MEM_MB_DM5 AJ23 AJ25 MEM_MA_DM5
MEM_MB_DM4 MB_DM5 MA_DM5
AK29 MB_DM4 MA_DM4 AH29 MEM_MA_DM4
MEM_MB_DM3 C30 B29 MEM_MA_DM3
MEM_MB_DM2 MB_DM3 MA_DM3 AMD USE 16.9 OHM
A23 MB_DM2 MA_DM2 E24 MEM_MA_DM2 R255
MEM_MB_DM1 B17 E18 MEM_MA_DM1 15-1
MEM_MB_DM0 MB_DM1 MA_DM1
B13 MB_DM0 MA_DM0 H15 MEM_MA_DM0
CPU_M_VREF_SUS
12 MEM_MB_DQS8_P J31 MB_DQS_H8 MA_DQS_H8 J28 MEM_MA_DQS8_P 11
12 MEM_MB_DQS8_N J30 MB_DQS_L8 MA_DQS_L8 J27 MEM_MA_DQS8_N 11
12 MEM_MB_DQS7_P AK13 MB_DQS_H7 MA_DQS_H7 AD15 MEM_MA_DQS7_P 11
12 MEM_MB_DQS7_N AJ13 MB_DQS_L7 MA_DQS_L7 AE15 MEM_MA_DQS7_N 11
AK17 AG18 C223 C222
12 MEM_MB_DQS6_P MB_DQS_H6 MA_DQS_H6 MEM_MA_DQS6_P 11 AMD USE 16.9 OHM
AJ17 AG19 R254 .1U-04 1000P-04
12 MEM_MB_DQS6_N MB_DQS_L6 MA_DQS_L6 MEM_MA_DQS6_N 11
AK23 AG24 15-1
12 MEM_MB_DQS5_P MB_DQS_H5 MA_DQS_H5 MEM_MA_DQS5_P 11
12 MEM_MB_DQS5_N AL23 MB_DQS_L5 MA_DQS_L5 AG25 MEM_MA_DQS5_N 11
12 MEM_MB_DQS4_P AL28 MB_DQS_H4 MA_DQS_H4 AG27 MEM_MA_DQS4_P 11
1
12 MEM_MB_DQS4_N AL29 MB_DQS_L4 MA_DQS_L4 AG28 MEM_MA_DQS4_N 11 1
12 MEM_MB_DQS3_P D31 MB_DQS_H3 MA_DQS_H3 D29 MEM_MA_DQS3_P 11
12 MEM_MB_DQS3_N C31 MB_DQS_L3 MA_DQS_L3 C29 MEM_MA_DQS3_N 11
12 MEM_MB_DQS2_P C24 MB_DQS_H2 MA_DQS_H2 C25 MEM_MA_DQS2_P 11
12 MEM_MB_DQS2_N C23 MB_DQS_L2 MA_DQS_L2 D25 MEM_MA_DQS2_N 11
12 MEM_MB_DQS1_P D17
C17
MB_DQS_H1 MA_DQS_H1 E19
F19
MEM_MA_DQS1_P 11 Elitegroup Computer System
12 MEM_MB_DQS1_N MB_DQS_L1 MA_DQS_L1 MEM_MA_DQS1_N 11
12 MEM_MB_DQS0_P C14 MB_DQS_H0 MA_DQS_H0 F15 MEM_MA_DQS0_P 11
C13 G15 Title
12 MEM_MB_DQS0_N MB_DQS_L0 MA_DQS_L0 MEM_MA_DQS0_N 11
M2 DDR2 MEMORY I/F
Size Document Number Rev
Athlon 64 M2 C 1.0
Processor Socket RS485M-M
Date: Friday, April 07, 2006 Sheet 9 of 35
A B C D E
A B C D E
Processor Power and Ground
VCORE VCORE VCORE V_DIMM
CPU1E CPU1F CPU1H
A4 R10 R12 Y29 CPU1G T22 U4
VDD1 VDD106 VDD107 VDDIO28 VSS183 VSS184
A6 VDD2 VDD105 R8 R14 VDD108 VDDIO27 Y28 A3 VSS1 VSS121 H10 T20 VSS182 VSS185 U5
AA8 VDD3 VDD104 R5 R16 VDD109 VDDIO26 Y26 A7 VSS2 VSS120 H8 T18 VSS181 VSS186 U7
4
AA10 VDD4 VDD103 R4 R18 VDD110 VDDIO25 Y24 A9 VSS3 VSS119 G11 T16 VSS180 VSS187 U9 4
AA12 VDD5 VDD102 P19 R20 VDD111 VDDIO24 V30 A11 VSS4 VSS118 G9 T14 VSS179 VSS188 U11
AA14 VDD6 VDD101 P17 T2 VDD112 VDDIO23 V28 AA4 VSS5 VSS117 F30 T12 VSS178 VSS189 U13
AA16 VDD7 VDD100 P15 T3 VDD113 VDDIO22 V26 AA5 VSS6 VSS116 F28 T10 VSS177 VSS190 U15
AA18 VDD8 VDD99 P13 T7 VDD114 VDDIO21 V25 AA7 VSS7 VSS115 F26 T8 VSS176 VSS191 U17
AB7 VDD9 VDD98 P11 T9 VDD115 VDDIO20 T30 AA9 VSS8 VSS114 F24 R23 VSS175 VSS192 U19
AB9 VDD10 VDD97 P9 T11 VDD116 VDDIO19 T28 AA11 VSS9 VSS113 F22 R21 VSS174 VSS193 U21
AB11 VDD11 VDD96 P7 T13 VDD117 VDDIO18 T26 AA13 VSS10 VSS112 F20 R19 VSS173 VSS194 U23
AC4 VDD12 VDD95 N18 T15 VDD118 VDDIO17 T24 AA15 VSS11 VSS111 F18 R17 VSS172 VSS195 V2
AC5 VDD13 VDD94 N16 T17 VDD119 VDDIO16 P30 AA17 VSS12 VSS110 F16 R15 VSS171 VSS196 V3
AC8 VDD14 VDD93 N14 T19 VDD120 VDDIO15 P28 AA19 VSS13 VSS109 F14 R13 VSS170 VSS197 V10
AC10 VDD15 VDD92 N12 T21 VDD121 VDDIO14 P26 AA21 VSS14 VSS108 F4 R11 VSS169 VSS198 V12
AD2 VDD16 VDD91 N10 U8 VDD122 VDDIO13 P24 AA23 VSS15 VSS107 E11 R9 VSS168 VSS199 V14
AD3 VDD17 VDD90 N8 U10 VDD123 VDDIO12 M30 AB2 VSS16 VSS106 D30 R7 VSS167 VSS200 V16
AD7 VDD18 VDD89 M19 U12 VDD124 VDDIO11 M28 AB3 VSS17 VSS105 D28 P22 VSS166 VSS201 V18
AD9 VDD19 VDD88 M17 U14 VDD125 VDDIO10 M26 AB8 VSS18 VSS104 D26 P20 VSS165 VSS202 V20
AE10 VDD20 VDD87 M15 U16 VDD126 VDDIO9 M24 AB10 VSS19 VSS103 D24 P18 VSS164 VSS203 V22
AF7 VDD21 VDD86 M13 U18 VDD127 VDDIO AF30 AB12 VSS20 VSS102 D22 P16 VSS163 VSS204 W9
POWER2
AF9 VDD22 VDD85 M11 U20 VDD128 VDDIO8 AD30 AB14 VSS21 VSS101 D20 P14 VSS162 VSS205 W11
AG4 VDD23 VDD84 M9 V9 VDD129 VDDIO7 AD28 AB16 VSS22 VSS100 D18 P12 VSS161 VSS206 W13
AG5 M7 V11 AD26 AB18 D16 P10 W15
POWER1
VDD24 VDD83 VDD130 VDDIO6 VSS23 VSS99 VSS160 VSS207
AG7 VDD25 VDD82 M3 V13 VDD131 VDDIO5 AC24 AB20 VSS24 VSS98 D14 P8 VSS159 VSS208 W17
AH2 VDD26 VDD81 M2 V15 VDD132 VDDIO4 AB30 AB22 VSS25 VSS97 C3 P3 VSS158 VSS209 W19
AH3 VDD27 VDD80 L18 V17 VDD133 VDDIO3 AB28 AC7 VSS26 VSS96 B30 P2 VSS157 VSS210 W21
GND1
B3 VDD28 VDD79 L16 V19 VDD134 VDDIO2 AB26 AC9 VSS27 VSS95 B28 N23 VSS156 VSS211 W23
GND2
B5 VDD29 VDD78 L14 V21 VDD135 VDDIO1 AB24 AC11 VSS28 VSS94 B26 N21 VSS155 VSS212 Y8
B7 VDD30 VDD77 Y19 W4 VDD136 AC13 VSS29 VSS93 B24 N19 VSS154 VSS213 Y10
C2 VDD31 VDD76 Y17 W5 VDD137 VDD184 Y23 AC15 VSS30 VSS92 B22 N17 VSS153 VSS214 Y12
C4 VDD32 VDD75 L12 W8 VDD138 VDD183 W22 AC17 VSS31 VSS91 B20 Y18 VSS152 VSS215 W7
C6 VDD33 VDD74 L10 W10 VDD139 VDD182 V23 AC19 VSS32 VSS90 B18 K22 VSS151 VSS216 Y20
3 C8 VDD34 VDD73 L8 W12 VDD140 VDD181 U22 AC21 VSS33 VSS89 B16 K20 VSS150 VSS217 Y22 3
D3 VDD35 VDD72 L5 W14 VDD141 VDD180 T23 AC23 VSS34 VSS88 B14 K18 VSS149 VSS218 K24
D5 VDD36 VDD71 L4 W16 VDD142 VDD179 R22 AD8 VSS35 VSS87 B11 K16 VSS148 VSS219 K26
D7 VDD37 VDD70 K23 W18 VDD143 VDD178 P23 AD10 VSS36 VSS86 B9 K14 VSS147 VSS220 K28
D9 VDD38 VDD69 K21 W20 VDD144 VDD177 P21 AD12 VSS37 VSS85 B4 K12 VSS146 VSS221 K30
E4 VDD39 VDD68 K19 Y2 VDD145 VDD176 N22 AD14 VSS38 VSS84 AL5 K10 VSS145 VSS222 L7
E6 VDD40 VDD67 K17 Y3 VDD146 VDD175 N20 AD16 VSS39 VSS83 AK30 K8 VSS144 VSS223 L9
E8 VDD41 VDD66 K15 Y7 VDD147 VDD174 M23 AD20 VSS40 VSS82 AK28 K3 VSS143 VSS224 L11
E10 VDD42 VDD65 K13 Y9 VDD148 VDD173 M21 AD22 VSS41 VSS81 AK26 K2 VSS142 VSS225 L13
F5 VDD43 VDD64 K11 Y11 VDD149 VDD172 L22 AD24 VSS42 VSS80 AK24 J23 VSS141 VSS226 L15
F7 VDD44 VDD63 K9 Y13 VDD150 VDD171 L20 AE4 VSS43 VSS79 AK22 J21 VSS140 VSS227 L17
F9 VDD45 VDD62 K7 Y15 VDD151 VDD170 AF11 AE5 VSS44 VSS78 AK20 J19 VSS139 VSS228 L19
F11 VDD46 VDD61 J24 Y21 VDD152 VDD169 AE12 AE9 VSS45 VSS77 Y16 J17 VSS138 VSS229 L21
G6 VDD47 VDD60 J22 AA20 VDD153 VDD168 AD23 AE11 VSS46 VSS76 Y14 J15 VSS137 VSS230 L23
G8 VDD48 VDD59 J20 AA22 VDD154 VDD167 AD11 AF2 VSS47 VSS75 AK18 J13 VSS136 VSS231 M8
G10 VDD49 VDD58 J18 AB13 VDD155 VDD166 AC22 AF3 VSS48 VSS74 AK16 J11 VSS135 VSS232 M10
G12 VDD50 VDD57 J16 AB15 VDD156 VDD165 AC20 AF8 VSS49 VSS73 AK14 J9 VSS134 VSS233 M12
H7 VDD51 VDD56 J14 AB17 VDD157 VDD164 AC18 AF10 VSS50 VSS72 AK2 J7 VSS133 VSS234 M14
H11 VDD52 VDD55 J12 AB19 VDD158 VDD163 AC16 AF12 VSS51 VSS71 AH30 J5 VSS132 VSS235 M16
H23 VDD53 VDD54 J8 AB21 VDD159 VDD162 AC14 AF14 VSS52 VSS70 AH28 J4 VSS131 VSS236 M18
AB23 VDD160 VDD161 AC12 AF16 VSS53 VSS69 AH26 H30 VSS130 VSS237 M20
AF18 VSS54 VSS68 AH24 H28 VSS129 VSS238 M22
Athlon 64 M2 AF20 AH22 H26 N4
Processor Socket VSS55 VSS67 VSS128 VSS239
AF22 VSS56 VSS66 AH20 H24 VSS127 VSS240 N5
AF24 VSS57 VSS65 AH18 H22 VSS126 VSS241 N7
AF26 VSS58 VSS64 AH16 H18 VSS125 VSS242 N9
AF28 VSS59 VSS63 AH14 H16 VSS124 VSS243 N11
AG10 VSS61 VSS62 AG11 H14 VSS123 VSS244 N13
H12 VSS122 VSS245 N15
m2
2 Athlon 64 M2 2
Processor Socket
m2
Bottomside Decoupling
V_DIMM Decoupling between processor and DIMMs
VCORE
Place as close to processor as possible
C310 C335 C336 C357
SC35 SC45 SC43 SC28 SC41 SC42 SC46 SC31 SC30 SC39 SC37 SC27 SC40 SC44 SC36
4.7U-08 4.7U-08 .22U .22U
20050926 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08 22U-08
VTT_DDR
VCORE
C238 C248 C234 C245 C241 C251 C232 C250
SC20 SC25 SC21 SC24 SC38
4.7U-08 4.7U-08 .22U .22U 1000P 1000P 10P 10P
.22U .22U .22U .01U 10pF
VTT_DDR
20050926
1
V_DIMM C272 C266 C277 C268 C274 C260 C256 C257 1
4.7U-08 4.7U-08 .22U .22U 1000P 1000P 10P 10P
SC49 SC55 SC53 SC51 SC47 SC50 SC52 SC48 SC54
20050926 22U-08 22U-08 4.7U-08 4.7U-08 .22U .22U .22U .01U 10P Elitegroup Computer System
Title
M2 POWER & GND
Size Document Number Rev
Custom 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 10 of 35
A B C D E
A B C D E
DIMM1A MEM_MA_ADD[15..0] DIMM3A MEM_MA_DATA[63..0]
9,14 MEM_MA_ADD[15..0] MEM_MA_DATA[63..0] 9
MEM_MA_ADD0 188 3 MEM_MA_DATA0 MEM_MA_ADD0 188 3 MEM_MA_DATA0
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1 MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1
183 A1 DQ1 4 183 A1 DQ1 4
MEM_MA_ADD2 63 9 MEM_MA_DATA2 MEM_MA_ADD2 63 9 MEM_MA_DATA2
MEM_MA_ADD3 A2 DQ2 MEM_MA_DATA3 MEM_MA_ADD3 A2 DQ2 MEM_MA_DATA3
182 A3 DQ3 10 182 A3 DQ3 10
MEM_MA_ADD4 61 122 MEM_MA_DATA4 MEM_MA_ADD4 61 122 MEM_MA_DATA4
MEM_MA_ADD5 A4 DQ4 MEM_MA_DATA5 MEM_MA_ADD5 A4 DQ4 MEM_MA_DATA5
60 A5 DQ5 123 60 A5 DQ5 123
MEM_MA_ADD6 180 128 MEM_MA_DATA6 MEM_MA_ADD6 180 128 MEM_MA_DATA6
MEM_MA_ADD7 A6 VDD VDDQ VDDID DQ6 MEM_MA_DATA7 MEM_MA_ADD7 A6 VDD VDDQ VDDID DQ6 MEM_MA_DATA7
58 A7 DQ7 129 58 A7 DQ7 129
MEM_MA_ADD8 179 3.3V 3.3V OPEN MEM_MA_ADD8 179 3.3V 3.3V OPEN
MEM_MA_ADD9 A8 3.3V 2.5V VSS MEM_MA_DATA8 MEM_MA_ADD9 A8 3.3V 2.5V VSS MEM_MA_DATA8
177 A9 DQ8 12 177 A9 DQ8 12
MEM_MA_ADD10 70 2.5V 2.5V OPEN 13 MEM_MA_DATA9 MEM_MA_ADD10 70 2.5V 2.5V OPEN 13 MEM_MA_DATA9
MEM_MA_ADD11 A10/AP 2.5V 1.8V VSS DQ9 MEM_MA_DATA10 MEM_MA_ADD11 A10/AP 2.5V 1.8V VSS DQ9 MEM_MA_DATA10
4
57 A11 DQ10 21 57 A11 DQ10 21 4
MEM_MA_ADD12 176 1.8V 1.8V OPEN 22 MEM_MA_DATA11 MEM_MA_ADD12 176 1.8V 1.8V OPEN 22 MEM_MA_DATA11
MEM_MA_ADD13 A12 DQ11 MEM_MA_DATA12 MEM_MA_ADD13 A12 DQ11 MEM_MA_DATA12
196 A13 DQ12 131 196 A13 DQ12 131
MEM_MA_ADD14 174 132 MEM_MA_DATA13 MEM_MA_ADD14 174 132 MEM_MA_DATA13
MEM_MA_ADD15 A14 DQ13 MEM_MA_DATA14 MEM_MA_ADD15 A14 DQ13 MEM_MA_DATA14
173 A15 DQ14 140 173 A15 DQ14 140
141 MEM_MA_DATA15 MEM_MA_BANK[2..0] 141 MEM_MA_DATA15
9,14 MEM_MA_BANK[2..0] DQ15 DQ15
MEM_MA_BANK0 71 MEM_MA_BANK0 71
MEM_MA_BANK1 BA0 MEM_MA_DATA16 MEM_MA_BANK1 BA0 MEM_MA_DATA16
190 BA1 DQ16 24 190 BA1 DQ16 24
MEM_MA_BANK2 54 25 MEM_MA_DATA17 MEM_MA_BANK2 54 25 MEM_MA_DATA17
PIN 92
PIN 92
A16/BA2 DQ17 MEM_MA_DATA18 A16/BA2 DQ17 MEM_MA_DATA18
30 30
PIN 184
PIN 184
DQ18 MEM_MA_DATA19 MEM_MA_DM[8..0] DQ18 MEM_MA_DATA19
9 MEM_MA_DM[8..0] DQ19 31 DQ19 31
MEM_MA_DM0 125 143 MEM_MA_DATA20 MEM_MA_DM0 125 143 MEM_MA_DATA20
MEM_MA_DM1 DQMB0 DQ20 MEM_MA_DATA21 MEM_MA_DM1 DQMB0 DQ20 MEM_MA_DATA21
134 DQMB1 DQ21 144 134 DQMB1 DQ21 144
MEM_MA_DM2 146 149 MEM_MA_DATA22 MEM_MA_DM2 146 149 MEM_MA_DATA22
MEM_MA_DM3 DQMB2 DQ22 MEM_MA_DATA23 MEM_MA_DM3 DQMB2 DQ22 MEM_MA_DATA23
155 DQMB3 DQ23 150 155 DQMB3 DQ23 150
MEM_MA_DM4 202 MEM_MA_DM4 202
MEM_MA_DM5 DQMB4 MEM_MA_DATA24 MEM_MA_DM5 DQMB4 MEM_MA_DATA24
211 DQMB5 DQ24 33 211 DQMB5 DQ24 33
MEM_MA_DM6 223 34 MEM_MA_DATA25 MEM_MA_DM6 223 34 MEM_MA_DATA25
MEM_MA_DM7 DQMB6 DQ25 MEM_MA_DATA26 MEM_MA_DM7 DQMB6 DQ25 MEM_MA_DATA26
232 DQMB7 DQ26 39 232 DQMB7 DQ26 39
MEM_MA_DM8 164 40 MEM_MA_DATA27 MEM_MA_DM8 164 40 MEM_MA_DATA27
NC/DQMB8 DQ27 MEM_MA_DATA28 NC/DQMB8 DQ27 MEM_MA_DATA28
DQ28 152 DQ28 152
6 153 MEM_MA_DATA29 6 153 MEM_MA_DATA29
9 MEM_MA_DQS0_N DQS0 DQ29 9 MEM_MA_DQS0_N DQS0 DQ29
7 158 MEM_MA_DATA30 7 158 MEM_MA_DATA30
9 MEM_MA_DQS0_P DQS0 DQ30 9 MEM_MA_DQS0_P DQS0 DQ30
15 159 MEM_MA_DATA31 15 159 MEM_MA_DATA31
9 MEM_MA_DQS1_N DQS1 DQ31 9 MEM_MA_DQS1_N DQS1 DQ31
9 MEM_MA_DQS1_P 16 DQS1 9 MEM_MA_DQS1_P 16 DQS1
27 80 MEM_MA_DATA32 27 80 MEM_MA_DATA32
PIN 53
PIN 53
9 MEM_MA_DQS2_N DQS2 DQ32 9 MEM_MA_DQS2_N DQS2 DQ32
28 81 MEM_MA_DATA33 28 81 MEM_MA_DATA33
PIN 145
PIN 145
9 MEM_MA_DQS2_P DQS2 DQ33 9 MEM_MA_DQS2_P DQS2 DQ33
36 86 MEM_MA_DATA34 36 86 MEM_MA_DATA34
9 MEM_MA_DQS3_N DQS3 DQ34 9 MEM_MA_DQS3_N DQS3 DQ34
37 87 MEM_MA_DATA35 37 87 MEM_MA_DATA35
9 MEM_MA_DQS3_P DQS3 DQ35 9 MEM_MA_DQS3_P DQS3 DQ35
83 199 MEM_MA_DATA36 83 199 MEM_MA_DATA36
PIN 52
PIN 52
9 MEM_MA_DQS4_N DQS4 DQ36 9 MEM_MA_DQS4_N DQS4 DQ36
84 200 MEM_MA_DATA37 84 200 MEM_MA_DATA37
PIN 144
PIN 144
3
9 MEM_MA_DQS4_P DQS4 DQ37 9 MEM_MA_DQS4_P DQS4 DQ37
3
92 205 MEM_MA_DATA38 92 205 MEM_MA_DATA38
9 MEM_MA_DQS5_N DQS5 DQ38 9 MEM_MA_DQS5_N DQS5 DQ38
93 206 MEM_MA_DATA39 93 206 MEM_MA_DATA39
9 MEM_MA_DQS5_P DQS5 DQ39 9 MEM_MA_DQS5_P DQS5 DQ39
9 MEM_MA_DQS6_N 104 DQS6 9 MEM_MA_DQS6_N 104 DQS6
105 89 MEM_MA_DATA40 105 89 MEM_MA_DATA40
9 MEM_MA_DQS6_P DQS6 DQ40 9 MEM_MA_DQS6_P DQS6 DQ40
113 90 MEM_MA_DATA41 113 90 MEM_MA_DATA41
9 MEM_MA_DQS7_N DQS7 DQ41 9 MEM_MA_DQS7_N DQS7 DQ41
114 95 MEM_MA_DATA42 114 95 MEM_MA_DATA42
9 MEM_MA_DQS7_P DQS7 DQ42 9 MEM_MA_DQS7_P DQS7 DQ42
45 96 MEM_MA_DATA43 45 96 MEM_MA_DATA43
9 MEM_MA_DQS8_N NC/DQS8 DQ43 9 MEM_MA_DQS8_N NC/DQS8 DQ43
46 208 MEM_MA_DATA44 46 208 MEM_MA_DATA44
9 MEM_MA_DQS8_P NC/DQS8 DQ44 9 MEM_MA_DQS8_P NC/DQS8 DQ44
209 MEM_MA_DATA45 209 MEM_MA_DATA45
DQ45 MEM_MA_DATA46 DQ45 MEM_MA_DATA46
9,14 MEM_MA_RAS- 192 RAS DQ46 214 9,14 MEM_MA_RAS- 192 RAS DQ46 214
74 215 MEM_MA_DATA47 74 215 MEM_MA_DATA47
9,14 MEM_MA_CAS- CAS DQ47 9,14 MEM_MA_CAS- CAS DQ47
9,14 MEM_MA_WE- 73 WE 9,14 MEM_MA_WE- 73 WE
98 MEM_MA_DATA48 98 MEM_MA_DATA48
DQ48 MEM_MA_DATA49 DQ48 MEM_MA_DATA49
9,14 MEM_MA0_CS_L0 193 S0 DQ49 99 9,14 MEM_MA1_CS_L0 193 S0 DQ49 99
76 107 MEM_MA_DATA50 76 107 MEM_MA_DATA50
9,14 MEM_MA0_CS_L1 S1 DQ50 9,14 MEM_MA1_CS_L1 S1 DQ50
108 MEM_MA_DATA51 108 MEM_MA_DATA51
DQ51 MEM_MA_DATA52 DQ51 MEM_MA_DATA52
9,14 MEM_MA_CKE0 52 CKE0 DQ52 217 9,14 MEM_MA_CKE1 52 CKE0 DQ52 217
171 218 MEM_MA_DATA53 171 218 MEM_MA_DATA53
CKE1 DQ53 MEM_MA_DATA54 CKE1 DQ53 MEM_MA_DATA54
DQ54 226 DQ54 226
195 227 MEM_MA_DATA55 195 227 MEM_MA_DATA55
9,14 MEM_MA0_ODT0 ODT0 DQ55 9,14 MEM_MA1_ODT0 ODT0 DQ55
77 ODT1 77 ODT1
110 MEM_MA_DATA56 110 MEM_MA_DATA56
DQ56 MEM_MA_DATA57 DQ56 MEM_MA_DATA57
9,14 MEM_MA0_CLK0_P 185 CK0 DQ57 111 9,14 MEM_MA1_CLK0_P 185 CK0 DQ57 111
186 116 MEM_MA_DATA58 186 116 MEM_MA_DATA58
9,14 MEM_MA0_CLK0_N CK0 DQ58 9,14 MEM_MA1_CLK0_N CK0 DQ58
117 MEM_MA_DATA59 117 MEM_MA_DATA59
BACK 93
BACK 93
DQ59 MEM_MA_DATA60 DQ59 MEM_MA_DATA60
137 229 137 229
PIN
PIN
9,14 MEM_MA0_CLK1_P CK1 DQ60 9,14 MEM_MA1_CLK1_P CK1 DQ60
138 230 MEM_MA_DATA61 138 230 MEM_MA_DATA61
9,14 MEM_MA0_CLK1_N CK1 DQ61 9,14 MEM_MA1_CLK1_N CK1 DQ61
VOLTAGE KEY 235 MEM_MA_DATA62 VOLTAGE KEY 235 MEM_MA_DATA62
FRONT PIN 1
FRONT PIN 1
DQ62 MEM_MA_DATA63 DQ62 MEM_MA_DATA63
9,14 MEM_MA0_CLK2_P 220 CK2 DQ63 236 9,14 MEM_MA1_CLK2_P 220 CK2 DQ63 236
2
9,14 MEM_MA0_CLK2_N 221 CK2 MEM_MA_CHECK[7..0] 99,14 MEM_MA1_CLK2_N 221 CK2 MEM_MA_CHECK[7..0] 9
2
42 MEM_MA_CHECK0 42 MEM_MA_CHECK0
CB0 MEM_MA_CHECK1 CB0 MEM_MA_CHECK1
239 SA0 CB1 43 239 SA0 CB1 43
240 48 MEM_MA_CHECK2 VCC3 240 48 MEM_MA_CHECK2
SA1 CB2 MEM_MA_CHECK3 SA1 CB2 MEM_MA_CHECK3
101 SA2 CB3 49 101 SA2 CB3 49
161 MEM_MA_CHECK4 20050920 161 MEM_MA_CHECK4
CB4 MEM_MA_CHECK5 CB4 MEM_MA_CHECK5
CB5 162 CB5 162
120 167 MEM_MA_CHECK6 120 167 MEM_MA_CHECK6
3,12,19,21,24,26 SMBCK
20051003 SCL VDDQ= 2.5V 1.8V 3.3V CB6 3,12,19,21,24,26 SMBCK
20051003 SCL VDDQ= 2.5V 1.8V 3.3V CB6
119 168 MEM_MA_CHECK7 119 168 MEM_MA_CHECK7
3,12,19,21,24,26 SMBDT SDA CB7 3,12,19,21,24,26 SMBDT SDA CB7
238 FRONT VIEW 126 238 FRONT VIEW 126
VCC3 VDDSPD NC/DQS9 VCC3 VDDSPD NC/DQS9
NC/DQS10 135 NC/DQS10 135
102 NC/TEST NC/DQS11 147 102 NC/TEST NC/DQS11 147
NC/DQS12 156 NC/DQS12 156
55 RC0 NC/DQS13 203 55 RC0 NC/DQS13 203
18 RC1 NC/DQS14 212 18 RC1 NC/DQS14 212
NC/DQS15 224 NC/DQS15 224
19 233 V_DIMM 19 233
NC5 NC/DQS16 NC5 NC/DQS16
68 NC4 NC/DQS17 165 68 NC4 NC/DQS17 165
DDRII_DIMM_Socket DDRII_DIMM_Socket
R398 C394
AMD USE 59 OHM 49.9-1-04 .1U-04
20060221
MEM_M_VREF_SUS
VDD_VREF_SUS_MEM
C393 C391
1
AMD USE 59 OHM R388 .1U-04 1000P-04 1
49.9-1-04
20060221 20060221 20060221
Elitegroup Computer System
Title
DIMM1 & DIMM2 (184 PIN DDR)
Size Document Number Rev
Custom 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 11 of 35
A B C D E
5 4 3 2 1
DIMM2A MEM_MB_ADD[15..0] DIMM4A MEM_MB_DATA[63..0]
9,14 MEM_MB_ADD[15..0] MEM_MB_DATA[63..0] 9
MEM_MB_ADD0 188 3 MEM_MB_DATA0 MEM_MB_ADD0 188 3 MEM_MB_DATA0
MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA1 MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA1
183 A1 DQ1 4 183 A1 DQ1 4
MEM_MB_ADD2 63 9 MEM_MB_DATA2 MEM_MB_ADD2 63 9 MEM_MB_DATA2
MEM_MB_ADD3 A2 DQ2 MEM_MB_DATA3 MEM_MB_ADD3 A2 DQ2 MEM_MB_DATA3
182 A3 DQ3 10 182 A3 DQ3 10
MEM_MB_ADD4 61 122 MEM_MB_DATA4 MEM_MB_ADD4 61 122 MEM_MB_DATA4
MEM_MB_ADD5 A4 DQ4 MEM_MB_DATA5 MEM_MB_ADD5 A4 DQ4 MEM_MB_DATA5
60 A5 DQ5 123 60 A5 DQ5 123
MEM_MB_ADD6 180 128 MEM_MB_DATA6 MEM_MB_ADD6 180 128 MEM_MB_DATA6
MEM_MB_ADD7 A6 VDD VDDQ VDDID DQ6 MEM_MB_DATA7 MEM_MB_ADD7 A6 VDD VDDQ VDDID DQ6 MEM_MB_DATA7
58 A7 DQ7 129 58 A7 DQ7 129
MEM_MB_ADD8 179 3.3V 3.3V OPEN MEM_MB_ADD8 179 3.3V 3.3V OPEN
MEM_MB_ADD9 A8 3.3V 2.5V VSS MEM_MB_DATA8 MEM_MB_ADD9 A8 3.3V 2.5V VSS MEM_MB_DATA8
177 A9 DQ8 12 177 A9 DQ8 12
MEM_MB_ADD10 70 2.5V 2.5V OPEN 13 MEM_MB_DATA9 MEM_MB_ADD10 70 2.5V 2.5V OPEN 13 MEM_MB_DATA9
D
MEM_MB_ADD11 A10/AP 2.5V 1.8V VSS DQ9 MEM_MB_DATA10 MEM_MB_ADD11 A10/AP 2.5V 1.8V VSS DQ9 MEM_MB_DATA10 D
57 A11 DQ10 21 57 A11 DQ10 21
MEM_MB_ADD12 176 1.8V 1.8V OPEN 22 MEM_MB_DATA11 MEM_MB_ADD12 176 1.8V 1.8V OPEN 22 MEM_MB_DATA11
MEM_MB_ADD13 A12 DQ11 MEM_MB_DATA12 MEM_MB_ADD13 A12 DQ11 MEM_MB_DATA12
196 A13 DQ12 131 196 A13 DQ12 131
MEM_MB_ADD14 174 132 MEM_MB_DATA13 MEM_MB_ADD14 174 132 MEM_MB_DATA13
MEM_MB_ADD15 A14 DQ13 MEM_MB_DATA14 MEM_MB_ADD15 A14 DQ13 MEM_MB_DATA14
173 A15 DQ14 140 173 A15 DQ14 140
141 MEM_MB_DATA15 MEM_MB_BANK[2..0] 141 MEM_MB_DATA15
9,14 MEM_MB_BANK[2..0] DQ15 DQ15
MEM_MB_BANK0 71 MEM_MB_BANK0 71
MEM_MB_BANK1 BA0 MEM_MB_DATA16 MEM_MB_BANK1 BA0 MEM_MB_DATA16
190 BA1 DQ16 24 190 BA1 DQ16 24
MEM_MB_BANK2 54 25 MEM_MB_DATA17 MEM_MB_BANK2 54 25 MEM_MB_DATA17
PIN 92
PIN 92
A16/BA2 DQ17 MEM_MB_DATA18 A16/BA2 DQ17 MEM_MB_DATA18
30 30
PIN 184
PIN 184
DQ18 MEM_MB_DATA19 MEM_MB_DM[8..0] DQ18 MEM_MB_DATA19
9 MEM_MB_DM[8..0] DQ19 31 DQ19 31
MEM_MB_DM0 125 143 MEM_MB_DATA20 MEM_MB_DM0 125 143 MEM_MB_DATA20
MEM_MB_DM1 DQMB0 DQ20 MEM_MB_DATA21 MEM_MB_DM1 DQMB0 DQ20 MEM_MB_DATA21
134 DQMB1 DQ21 144 134 DQMB1 DQ21 144
MEM_MB_DM2 146 149 MEM_MB_DATA22 MEM_MB_DM2 146 149 MEM_MB_DATA22
MEM_MB_DM3 DQMB2 DQ22 MEM_MB_DATA23 MEM_MB_DM3 DQMB2 DQ22 MEM_MB_DATA23
155 DQMB3 DQ23 150 155 DQMB3 DQ23 150
MEM_MB_DM4 202 MEM_MB_DM4 202
MEM_MB_DM5 DQMB4 MEM_MB_DATA24 MEM_MB_DM5 DQMB4 MEM_MB_DATA24
211 DQMB5 DQ24 33 211 DQMB5 DQ24 33
MEM_MB_DM6 223 34 MEM_MB_DATA25 MEM_MB_DM6 223 34 MEM_MB_DATA25
MEM_MB_DM7 DQMB6 DQ25 MEM_MB_DATA26 MEM_MB_DM7 DQMB6 DQ25 MEM_MB_DATA26
232 DQMB7 DQ26 39 232 DQMB7 DQ26 39
MEM_MB_DM8 164 40 MEM_MB_DATA27 MEM_MB_DM8 164 40 MEM_MB_DATA27
NC/DQMB8 DQ27 MEM_MB_DATA28 NC/DQMB8 DQ27 MEM_MB_DATA28
DQ28 152 DQ28 152
6 153 MEM_MB_DATA29 6 153 MEM_MB_DATA29
9 MEM_MB_DQS0_N DQS0 DQ29 9 MEM_MB_DQS0_N DQS0 DQ29
7 158 MEM_MB_DATA30 7 158 MEM_MB_DATA30
9 MEM_MB_DQS0_P DQS0 DQ30 9 MEM_MB_DQS0_P DQS0 DQ30
15 159 MEM_MB_DATA31 15 159 MEM_MB_DATA31
9 MEM_MB_DQS1_N DQS1 DQ31 9 MEM_MB_DQS1_N DQS1 DQ31
9 MEM_MB_DQS1_P 16 DQS1 9 MEM_MB_DQS1_P 16 DQS1
27 80 MEM_MB_DATA32 27 80 MEM_MB_DATA32
PIN 53
PIN 53
9 MEM_MB_DQS2_N DQS2 DQ32 9 MEM_MB_DQS2_N DQS2 DQ32
28 81 MEM_MB_DATA33 28 81 MEM_MB_DATA33
PIN 145
PIN 145
9 MEM_MB_DQS2_P DQS2 DQ33 9 MEM_MB_DQS2_P DQS2 DQ33
36 86 MEM_MB_DATA34 36 86 MEM_MB_DATA34
9 MEM_MB_DQS3_N DQS3 DQ34 9 MEM_MB_DQS3_N DQS3 DQ34
37 87 MEM_MB_DATA35 37 87 MEM_MB_DATA35
9 MEM_MB_DQS3_P DQS3 DQ35 9 MEM_MB_DQS3_P DQS3 DQ35
C 83 199 MEM_MB_DATA36 83 199 MEM_MB_DATA36 C
PIN 52
PIN 52
9 MEM_MB_DQS4_N DQS4 DQ36 9 MEM_MB_DQS4_N DQS4 DQ36
84 200 MEM_MB_DATA37 84 200 MEM_MB_DATA37
PIN 144
PIN 144
9 MEM_MB_DQS4_P DQS4 DQ37 9 MEM_MB_DQS4_P DQS4 DQ37
92 205 MEM_MB_DATA38 92 205 MEM_MB_DATA38
9 MEM_MB_DQS5_N DQS5 DQ38 9 MEM_MB_DQS5_N DQS5 DQ38
93 206 MEM_MB_DATA39 93 206 MEM_MB_DATA39
9 MEM_MB_DQS5_P DQS5 DQ39 9 MEM_MB_DQS5_P DQS5 DQ39
9 MEM_MB_DQS6_N 104 DQS6 9 MEM_MB_DQS6_N 104 DQS6
105 89 MEM_MB_DATA40 105 89 MEM_MB_DATA40
9 MEM_MB_DQS6_P DQS6 DQ40 9 MEM_MB_DQS6_P DQS6 DQ40
113 90 MEM_MB_DATA41 113 90 MEM_MB_DATA41
9 MEM_MB_DQS7_N DQS7 DQ41 9 MEM_MB_DQS7_N DQS7 DQ41
114 95 MEM_MB_DATA42 114 95 MEM_MB_DATA42
9 MEM_MB_DQS7_P DQS7 DQ42 9 MEM_MB_DQS7_P DQS7 DQ42
45 96 MEM_MB_DATA43 45 96 MEM_MB_DATA43
9 MEM_MB_DQS8_N NC/DQS8 DQ43 9 MEM_MB_DQS8_N NC/DQS8 DQ43
46 208 MEM_MB_DATA44 46 208 MEM_MB_DATA44
9 MEM_MB_DQS8_P NC/DQS8 DQ44 9 MEM_MB_DQS8_P NC/DQS8 DQ44
209 MEM_MB_DATA45 209 MEM_MB_DATA45
DQ45 MEM_MB_DATA46 MEM_MB_RAS- DQ45 MEM_MB_DATA46
9,14 MEM_MB_RAS- 192 RAS DQ46 214 192 RAS DQ46 214
74 215 MEM_MB_DATA47 MEM_MB_CAS- 74 215 MEM_MB_DATA47
9,14 MEM_MB_CAS- CAS DQ47 CAS DQ47
73 MEM_MB_WE- 73
9,14 MEM_MB_WE- WE WE
98 MEM_MB_DATA48 98 MEM_MB_DATA48
DQ48 MEM_MB_DATA49 DQ48 MEM_MB_DATA49
9,14 MEM_MB0_CS_L0 193 S0 DQ49 99 9,14 MEM_MB1_CS_L0 193 S0 DQ49 99
76 107 MEM_MB_DATA50 76 107 MEM_MB_DATA50
9,14 MEM_MB0_CS_L1 S1 DQ50 9,14 MEM_MB1_CS_L1 S1 DQ50
108 MEM_MB_DATA51 108 MEM_MB_DATA51
DQ51 MEM_MB_DATA52 DQ51 MEM_MB_DATA52
9,14 MEM_MB_CKE0 52 CKE0 DQ52 217 9,14 MEM_MB_CKE1 52 CKE0 DQ52 217
171 218 MEM_MB_DATA53 171 218 MEM_MB_DATA53
CKE1 DQ53 MEM_MB_DATA54 CKE1 DQ53 MEM_MB_DATA54
DQ54 226 DQ54 226
195 227 MEM_MB_DATA55 195 227 MEM_MB_DATA55
9,14 MEM_MB0_ODT0 ODT0 DQ55 9,14 MEM_MB1_ODT0 ODT0 DQ55
77 ODT1 77 ODT1
110 MEM_MB_DATA56 110 MEM_MB_DATA56
DQ56 MEM_MB_DATA57 DQ56 MEM_MB_DATA57
9,14 MEM_MB0_CLK0_P 185 CK0 DQ57 111 9,14 MEM_MB1_CLK0_P 185 CK0 DQ57 111
186 116 MEM_MB_DATA58 186 116 MEM_MB_DATA58
9,14 MEM_MB0_CLK0_N CK0 DQ58 9,14 MEM_MB1_CLK0_N CK0 DQ58
117 MEM_MB_DATA59 117 MEM_MB_DATA59
BACK 93
BACK 93
DQ59 MEM_MB_DATA60 DQ59 MEM_MB_DATA60
137 229 137 229
PIN
PIN
9,14 MEM_MB0_CLK1_P CK1 DQ60 9,14 MEM_MB1_CLK1_P CK1 DQ60
138 230 MEM_MB_DATA61 138 230 MEM_MB_DATA61
9,14 MEM_MB0_CLK1_N CK1 DQ61 9,14 MEM_MB1_CLK1_N CK1 DQ61
VOLTAGE KEY 235 MEM_MB_DATA62 VOLTAGE KEY 235 MEM_MB_DATA62
FRONT PIN 1
FRONT PIN 1
B DQ62 MEM_MB_DATA63 DQ62 MEM_MB_DATA63 B
9,14 MEM_MB0_CLK2_P 220 CK2 DQ63 236 9,14 MEM_MB1_CLK2_P 220 CK2 DQ63 236
221 221 MEM_MB_CHECK[7..0]
9,14 MEM_MB0_CLK2_N CK2 MEM_MB_CHECK[7..0] 9 9,14 MEM_MB1_CLK2_N CK2
42 MEM_MB_CHECK0 42 MEM_MB_CHECK0
CB0 MEM_MB_CHECK1 CB0 MEM_MB_CHECK1
VCC3 239 SA0 CB1 43 239 SA0 CB1 43
240 48 MEM_MB_CHECK2 VCC3 240 48 MEM_MB_CHECK2
SA1 CB2 MEM_MB_CHECK3 SA1 CB2 MEM_MB_CHECK3
101 SA2 CB3 49 101 SA2 CB3 49
161 MEM_MB_CHECK4 161 MEM_MB_CHECK4
CB4 MEM_MB_CHECK5 CB4 MEM_MB_CHECK5
CB5 162 CB5 162
120 167 MEM_MB_CHECK6 SMBCK 120 167 MEM_MB_CHECK6
3,11,19,21,24,26 SMBCK
20051003 SCL VDDQ= 2.5V 1.8V 3.3V CB6 20051003 SCL VDDQ= 2.5V 1.8V 3.3V CB6
119 168 MEM_MB_CHECK7 SMBDT 119 168 MEM_MB_CHECK7
3,11,19,21,24,26 SMBDT SDA CB7 SDA CB7
238 FRONT VIEW 126 238 FRONT VIEW 126
VCC3 VDDSPD NC/DQS9 VCC3 VDDSPD NC/DQS9
NC/DQS10 135 NC/DQS10 135
102 NC/TEST NC/DQS11 147 102 NC/TEST NC/DQS11 147
NC/DQS12 156 NC/DQS12 156
55 RC0 NC/DQS13 203 55 RC0 NC/DQS13 203
18 RC1 NC/DQS14 212 18 RC1 NC/DQS14 212
NC/DQS15 224 NC/DQS15 224
19 NC5 NC/DQS16 233 19 NC5 NC/DQS16 233
68 NC4 NC/DQS17 165 68 NC4 NC/DQS17 165
DDRII_DIMM_Socket DDRII_DIMM_Socket
A A
Elitegroup Computer System
Title
DIMM3 & DIMM4 (184 PIN DDR)
Size Document Number Rev
Custom 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 12 of 35
5 4 3 2 1
5 4 3 2 1
V_DIMM V_DIMM V_DIMM V_DIMM
D DIMM1B DIMM3B DIMM2B DIMM4B D
2 VSS1 VDDQ1 181 2 VSS1 VDDQ1 181 2 VSS1 VDDQ1 181 2 VSS1 VDDQ1 181
5 VSS2 VDDQ2 62 5 VSS2 VDDQ2 62 5 VSS2 VDDQ2 62 5 VSS2 VDDQ2 62
8 VSS3 VDDQ3 191 8 VSS3 VDDQ3 191 8 VSS3 VDDQ3 191 8 VSS3 VDDQ3 191
11 VSS4 VDDQ4 72 11 VSS4 VDDQ4 72 11 VSS4 VDDQ4 72 11 VSS4 VDDQ4 72
14 VSS5 VDDQ5 194 14 VSS5 VDDQ5 194 14 VSS5 VDDQ5 194 14 VSS5 VDDQ5 194
17 VSS6 VDDQ6 75 17 VSS6 VDDQ6 75 17 VSS6 VDDQ6 75 17 VSS6 VDDQ6 75
20 VSS7 VDDQ7 78 20 VSS7 VDDQ7 78 20 VSS7 VDDQ7 78 20 VSS7 VDDQ7 78
23 VSS8 VDDQ8 170 23 VSS8 VDDQ8 170 23 VSS8 VDDQ8 170 23 VSS8 VDDQ8 170
26 VSS9 VDDQ9 51 26 VSS9 VDDQ9 51 26 VSS9 VDDQ9 51 26 VSS9 VDDQ9 51
29 VSS10 VDDQ10 175 29 VSS10 VDDQ10 175 29 VSS10 VDDQ10 175 29 VSS10 VDDQ10 175
32 VSS11 VDDQ11 56 32 VSS11 VDDQ11 56 32 VSS11 VDDQ11 56 32 VSS11 VDDQ11 56
35 VSS12 35 VSS12 35 VSS12 35 VSS12
38 VSS13 38 VSS13 38 VSS13 38 VSS13
41 VSS14 VDD1 53 41 VSS14 VDD1 53 41 VSS14 VDD1 53 41 VSS14 VDD1 53
44 VSS15 VDD2 59 44 VSS15 VDD2 59 44 VSS15 VDD2 59 44 VSS15 VDD2 59
47 VSS16 VDD3 64 47 VSS16 VDD3 64 47 VSS16 VDD3 64 47 VSS16 VDD3 64
50 VSS17 VDD4 67 50 VSS17 VDD4 67 50 VSS17 VDD4 67 50 VSS17 VDD4 67
65 VSS18 VDD5 69 65 VSS18 VDD5 69 65 VSS18 VDD5 69 65 VSS18 VDD5 69
66 VSS19 VDD6 172 66 VSS19 VDD6 172 66 VSS19 VDD6 172 66 VSS19 VDD6 172
79 VSS20 VDD7 178 79 VSS20 VDD7 178 79 VSS20 VDD7 178 79 VSS20 VDD7 178
82 VSS21 VDD8 184 82 VSS21 VDD8 184 82 VSS21 VDD8 184 82 VSS21 VDD8 184
85 VSS22 VDD9 187 85 VSS22 VDD9 187 85 VSS22 VDD9 187 85 VSS22 VDD9 187
88 VSS23 VDD10 189 88 VSS23 VDD10 189 88 VSS23 VDD10 189 88 VSS23 VDD10 189
91 VSS24 VDD11 197 91 VSS24 VDD11 197 91 VSS24 VDD11 197 91 VSS24 VDD11 197
94 VSS25 94 VSS25 94 VSS25 94 VSS25
97 VSS26 97 VSS26 97 VSS26 97 VSS26
100 VSS27 VREF 1 MEM_M_VREF_SUS 100 VSS27 VREF 1 MEM_M_VREF_SUS 100 VSS27 VREF 1 MEM_M_VREF_SUS 100 VSS27 VREF 1 MEM_M_VREF_SUS
103 VSS28 103 VSS28 103 VSS28 103 VSS28
106 VSS29 106 VSS29 106 VSS29 106 VSS29
109 VSS30 109 VSS30 109 VSS30 109 VSS30
112 C386 112 C389 112 C407 112 C406
VSS31 .1U-04 VSS31 .1U-04 VSS31 .1U-04 VSS31 .1U-04
115 VCC32 115 VCC32 115 VCC32 115 VCC32
118 VSS33 VSS49 166 118 VSS33 VSS49 166 118 VSS33 VSS49 166 118 VSS33 VSS49 166
C
121 VSS34 VSS50 169 121 VSS34 VSS50 169 121 VSS34 VSS50 169 121 VSS34 VSS50 169 C
124 VSS35 VSS51 198 124 VSS35 VSS51 198 124 VSS35 VSS51 198 124 VSS35 VSS51 198
127 VSS36 VSS52 201 127 VSS36 VSS52 201 127 VSS36 VSS52 201 127 VSS36 VSS52 201
130 VSS37 VSS53 204 130 VSS37 VSS53 204 130 VSS37 VSS53 204 130 VSS37 VSS53 204
133 VSS38 VSS54 207 133 VSS38 VSS54 207 133 VSS38 VSS54 207 133 VSS38 VSS54 207
136 VSS39 VSS55 210 136 VSS39 VSS55 210 136 VSS39 VSS55 210 136 VSS39 VSS55 210
139 VSS40 VSS56 213 139 VSS40 VSS56 213 139 VSS40 VSS56 213 139 VSS40 VSS56 213
142 VSS41 VSS57 216 142 VSS41 VSS57 216 142 VSS41 VSS57 216 142 VSS41 VSS57 216
145 VSS42 VSS58 219 145 VSS42 VSS58 219 145 VSS42 VSS58 219 145 VSS42 VSS58 219
148 VSS43 VSS59 222 148 VSS43 VSS59 222 148 VSS43 VSS59 222 148 VSS43 VSS59 222
151 VSS44 VSS60 225 151 VSS44 VSS60 225 151 VSS44 VSS60 225 151 VSS44 VSS60 225
154 VSS45 VSS61 228 154 VSS45 VSS61 228 154 VSS45 VSS61 228 154 VSS45 VSS61 228
157 VSS46 VSS62 231 157 VSS46 VSS62 231 157 VSS46 VSS62 231 157 VSS46 VSS62 231
160 VSS47 VSS63 234 160 VSS47 VSS63 234 160 VSS47 VSS63 234 160 VSS47 VSS63 234
163 VSS48 VSS64 237 163 VSS48 VSS64 237 163 VSS48 VSS64 237 163 VSS48 VSS64 237
DDRII_DIMM_Socket DDRII_DIMM_Socket DDRII_DIMM_Socket DDRII_DIMM_Socket
B B
A A
Elitegroup Computer Systems
Title
DDR2 DIMMS POWER
Size Document Number Rev
Custom
RS485M-M 1.0
Date: Friday, April 07, 2006 Sheet 13 of 35
5 4 3 2 1
A B C D E
VTT_DDR
VTT_DDR
MEM_MA_ADD[15..0]
9,11 MEM_MA_ADD[15..0] MEM_MB_ADD[15..0]
MEM_MA_ADD15 RN25B 2 7 47R V_DIMM
20050922 9,12 MEM_MB_ADD[15..0]
MEM_MA_ADD14 RN25A 1 8 47R C421 .1U-04 MEM_MB_ADD15 RN13C 3 6 47R V_DIMM
MEM_MA_ADD13 RN27A 1 8 47R MEM_MB_ADD14 RN13D 4 5 47R C425 .1U-04 20050922
MEM_MA_ADD12 RN24C 3 6 47R C422 .1U-04 MEM_MB_ADD13 RN15D 4 5 47R
MEM_MA_ADD11 RN24A 1 8 47R V_DIMM MEM_MB_ADD12 RN12B 2 7 47R C416 .1U-04
MEM_MA_ADD10 RN21B 2 7 47R C428 .1U-04 20050922 MEM_MB_ADD11 RN12D 4 5 47R V_DIMM
MEM_MA_ADD9 RN24B 2 7 47R MEM_MB_ADD10 RN17C 3 6 47R C447 .1U-04 20050922
MEM_MA_ADD8 RN23C 3 6 47R C436 .1U-04 MEM_MB_ADD9 RN12C 3 6 47R
MEM_MA_ADD7 RN23D 4 5 47R V_DIMM MEM_MB_ADD8 RN19B 2 7 47R C418 .1U-04
4
MEM_MA_ADD6 RN23B 2 7 47R C445 .1U-04 20050922 MEM_MB_ADD7 RN19A 1 8 47R 4
V_DIMM
MEM_MA_ADD5 RN23A 1 8 47R MEM_MB_ADD6 RN19C 3 6 47R C423 .1U-04 20050922
MEM_MA_ADD4 RN22D 4 5 47R C420 .1U-04 MEM_MB_ADD5 RN19D 4 5 47R
MEM_MA_ADD3 RN22C 3 6 47R V_DIMM MEM_MB_ADD4 RN18A 1 8 47R C435 .1U-04
MEM_MA_ADD2 RN22A 1 8 47R C441 .1U-04 20050922 MEM_MB_ADD3 RN18B 2 7 47R V_DIMM
MEM_MA_ADD1 RN22B 2 7 47R MEM_MB_ADD2 RN18D 4 5 47R C443 .1U-04 20050922
MEM_MA_BANK[2..0] MEM_MA_ADD0 RN21D 4 5 47R C414 .1U-04 MEM_MB_ADD1 RN18C 3 6 47R
9,11 MEM_MA_BANK[2..0] MEM_MB_BANK[2..0]
MEM_MA_BANK2 RN24D 4 5 47R V_DIMM MEM_MB_ADD0 RN17A 1 8 47R C410 .1U-04
20050922 9,12 MEM_MB_BANK[2..0]
MEM_MA_BANK1 RN21C 3 6 47R C437 .1U-04 MEM_MB_BANK2 RN12A 1 8 47R V_DIMM
MEM_MA_BANK0 RN21A 1 8 47R MEM_MB_BANK1 RN17B 2 7 47R C417 .1U-04 20050922
C440 .1U-04 MEM_MB_BANK0 RN17D 4 5 47R
C444 .1U-04
RN27C 3 6 47R V_DIMM
9,11 MEM_MA_CAS- 20050922
RN20A 1 8 47R C429 .1U-04 RN15B 2 7 47R V_DIMM
9,11 MEM_MA_WE- 9,12 MEM_MB_CAS- 20050922
RN20D 4 5 47R RN16D 4 5 47R C411 .1U-04
9,11 MEM_MA_RAS- 9,12 MEM_MB_WE-
C448 .1U-04 RN16B 2 7 47R
9,12 MEM_MB_RAS-
RN25D 4 5 47R C442 .1U-04
9,11 MEM_MA_CKE1
RN25C 3 6 47R V_DIMM RN13A 1 8 47R
9,11 MEM_MA_CKE0 20050922 9,12 MEM_MB_CKE1
C419 .1U-04 RN13B 2 7 47R V_DIMM
9,12 MEM_MB_CKE0 20050922
RN26D 4 5 47R C415 .1U-04
9,11 MEM_MA0_CS_L1
RN20C 3 6 47R RN14A 1 8 47R
9,11 MEM_MA0_CS_L0 9,12 MEM_MB0_CS_L1
RN27D 4 5 47R C438 .1U-04 RN16C 3 6 47R
9,11 MEM_MA0_ODT0 9,12 MEM_MB0_CS_L0
RN15C 3 6 47R C424 .1U-04
9,12 MEM_MB0_ODT0
RN26C 3 6 47R V_DIMM
9,11 MEM_MA1_CS_L1 20050922
RN20B 2 7 47R C413 .1U-04 RN16A 1 8 47R V_DIMM
9,11 MEM_MA1_CS_L0 9,12 MEM_MB1_CS_L0 20050922
RN27B 2 7 47R RN14B 2 7 47R C439 .1U-04
3
9,11 MEM_MA1_ODT0 9,12 MEM_MB1_CS_L1 3
C412 .1U-04 RN15A 1 8 47R
9,12 MEM_MB1_ODT0
C446 .1U-04
9,11 MEM_MA0_CLK2_P 9,11 MEM_MA1_CLK2_P
V_DIMM V_DIMM
C276 C278
MEM_MA_ADD15 C328 1 2 22P-04 1.5pF-04 MEM_MB_ADD15 C364 1 2 22P-04 1.5pF-04
MEM_MA_ADD14 C309 1 2 22P-04 MEM_MB_ADD14 C344 1 2 22P-04
9,11 MEM_MA0_CLK2_N 9,11 MEM_MA1_CLK2_N
MEM_MA_ADD13 C329 1 2 22P-04 MEM_MB_ADD13 C347 1 2 22P-04
MEM_MA_ADD12 C308 1 2 22P-04 MEM_MB_ADD12 C363 1 2 22P-04
9,11 MEM_MA0_CLK1_P 9,11 MEM_MA1_CLK1_P
MEM_MA_ADD11 C307 1 2 22P-04 MEM_MB_ADD11 C362 1 2 22P-04
MEM_MA_ADD10 C334 1 2 22P-04 MEM_MB_ADD10 C351 1 2 22P-04
MEM_MA_ADD9 C326 1 2 22P-04 C254 MEM_MB_ADD9 C342 1 2 22P-04 C259
MEM_MA_ADD8 C306 1 2 22P-04 1.5pF-04 MEM_MB_ADD8 C361 1 2 22P-04 1.5pF-04
MEM_MA_ADD7 C325 1 2 22P-04 MEM_MB_ADD7 C341 1 2 22P-04
9,11 MEM_MA0_CLK1_N 9,11 MEM_MA1_CLK1_N
MEM_MA_ADD6 C324 1 2 22P-04 MEM_MB_ADD6 C340 1 2 22P-04
MEM_MA_ADD5 C305 1 2 22P-04 MEM_MB_ADD5 C360 1 2 22P-04
9,11 MEM_MA0_CLK0_P 9,11 MEM_MA1_CLK0_P
MEM_MA_ADD4 C323 1 2 22P-04 MEM_MB_ADD4 C339 1 2 22P-04
MEM_MA_ADD3 C304 1 2 22P-04 MEM_MB_ADD3 C359 1 2 22P-04
MEM_MA_ADD2 C303 1 2 22P-04 SC56 MEM_MB_ADD2 C358 1 2 22P-04 SC57
MEM_MA_ADD1 C322 1 2 22P-04 1.5pF-04 MEM_MB_ADD1 C338 1 2 22P-04 1.5pF-04
MEM_MA_ADD0 C366 1 2 22P-04 MEM_MB_ADD0 C352 1 2 22P-04
9,11 MEM_MA0_CLK0_N 9,11 MEM_MA1_CLK0_N
2
MEM_MA_BANK2 C327 1 2 22P-04 MEM_MB_BANK2 C343 1 2 22P-04 2
9,12 MEM_MB0_CLK2_P 9,12 MEM_MB1_CLK2_P
MEM_MA_BANK1 C365 1 2 22P-04 MEM_MB_BANK1 C367 1 2 22P-04
MEM_MA_BANK0 C333 1 2 22P-04 MEM_MB_BANK0 C350 1 2 22P-04
C265 C270
MEM_MA_CAS- C330 1 2 22P-04 1.5pF-04 MEM_MB_CAS- C348 1 2 22P-04 1.5pF-04
MEM_MA_WE- C331 1 2 22P-04 MEM_MB_WE- C353 1 2 22P-04
9,12 MEM_MB0_CLK2_N 9,12 MEM_MB1_CLK2_N
MEM_MA_RAS- C332 1 2 22P-04 MEM_MB_RAS- C349 1 2 22P-04
9,12 MEM_MB0_CLK1_P 9,12 MEM_MB1_CLK1_P
C267 C271
1.5pF-04 1.5pF-04
9,12 MEM_MB0_CLK1_N VTT_DDR 9,12 MEM_MB1_CLK1_N
9,12 MEM_MB0_CLK0_P 9,12 MEM_MB1_CLK0_P
RN14D 4 5 47R
C288 RN14C 3 6 47R C285
20060404 1.5pF-04 RN26A 1 8 47R 1.5pF-04
RN26B 2 7 47R
9,12 MEM_MB0_CLK0_N 9,12 MEM_MB1_CLK0_N
V_DIMM
C552 .1U-04
1 1
Elitegroup Computer System
Title
DDR2 TERMINATION
Size Document Number Rev
C 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 14 of 35
A B C D E
A B C D E
4 4
U10A
8 HT_CADOUT15_P R19 HT_RXCAD15P HT_TXCAD15P P21 HT_CADIN15_P 8
8 HT_CADOUT15_N R18 HT_RXCAD15N PART 1 OF 5 HT_TXCAD15N P22 HT_CADIN15_N 8
8 HT_CADOUT14_P R21 HT_RXCAD14P HT_TXCAD14P P18 HT_CADIN14_P 8
8 HT_CADOUT14_N R22 HT_RXCAD14N HT_TXCAD14N P19 HT_CADIN14_N 8
8 HT_CADOUT13_P U22 HT_RXCAD13P HT_TXCAD13P M22 HT_CADIN13_P 8
8 HT_CADOUT13_N U21 HT_RXCAD13N HT_TXCAD13N M21 HT_CADIN13_N 8
8 HT_CADOUT12_P U18 HT_RXCAD12P HT_TXCAD12P M18 HT_CADIN12_P 8
8 HT_CADOUT12_N U19 HT_RXCAD12N HT_TXCAD12N M19 HT_CADIN12_N 8
8 HT_CADOUT11_P W19 HT_RXCAD11P HT_TXCAD11P L18 HT_CADIN11_P 8
8 HT_CADOUT11_N W20 HT_RXCAD11N HT_TXCAD11N L19 HT_CADIN11_N 8
8 HT_CADOUT10_P AC21 HT_RXCAD10P HT_TXCAD10P G22 HT_CADIN10_P 8
8 HT_CADOUT10_N AB22 HT_RXCAD10N HT_TXCAD10N G21 HT_CADIN10_N 8
HYPER TRANSPORT I/F
8 HT_CADOUT9_P AB20 HT_RXCAD9P HT_TXCAD9P J20 HT_CADIN9_P 8
8 HT_CADOUT9_N AA20 HT_RXCAD9N HT_TXCAD9N J21 HT_CADIN9_N 8
8 HT_CADOUT8_P AA19 HT_RXCAD8P HT_TXCAD8P F21 HT_CADIN8_P 8
8 HT_CADOUT8_N Y19 HT_RXCAD8N HT_TXCAD8N F22 HT_CADIN8_N 8
8 HT_CADOUT7_P T24 HT_RXCAD7P HT_TXCAD7P N24 HT_CADIN7_P 8
8 HT_CADOUT7_N R25 HT_RXCAD7N HT_TXCAD7N N25 HT_CADIN7_N 8
8 HT_CADOUT6_P U25 HT_RXCAD6P HT_TXCAD6P L25 HT_CADIN6_P 8
3
8 HT_CADOUT6_N U24 HT_RXCAD6N HT_TXCAD6N M24 HT_CADIN6_N 8 3
8 HT_CADOUT5_P V23 HT_RXCAD5P HT_TXCAD5P K25 HT_CADIN5_P 8
8 HT_CADOUT5_N U23 HT_RXCAD5N HT_TXCAD5N K24 HT_CADIN5_N 8
8 HT_CADOUT4_P V24 HT_RXCAD4P HT_TXCAD4P J23 HT_CADIN4_P 8
8 HT_CADOUT4_N V25 HT_RXCAD4N HT_TXCAD4N K23 HT_CADIN4_N 8
8 HT_CADOUT3_P AA25 HT_RXCAD3P HT_TXCAD3P G25 HT_CADIN3_P 8
8 HT_CADOUT3_N AA24 HT_RXCAD3N HT_TXCAD3N H24 HT_CADIN3_N 8
8 HT_CADOUT2_P AB23 HT_RXCAD2P HT_TXCAD2P F25 HT_CADIN2_P 8
8 HT_CADOUT2_N AA23 HT_RXCAD2N HT_TXCAD2N F24 HT_CADIN2_N 8
8 HT_CADOUT1_P AB24 HT_RXCAD1P HT_TXCAD1P E23 HT_CADIN1_P 8
8 HT_CADOUT1_N AB25 HT_RXCAD1N HT_TXCAD1N F23 HT_CADIN1_N 8
8 HT_CADOUT0_P AC24 HT_RXCAD0P HT_TXCAD0P E24 HT_CADIN0_P 8
8 HT_CADOUT0_N AC25 HT_RXCAD0N HT_TXCAD0N E25 HT_CADIN0_N 8
8 HT_CLKOUT1_P W21 HT_RXCLK1P HT_TXCLK1P L21 HT_CLKIN1_P 8
8 HT_CLKOUT1_N W22 HT_RXCLK1N HT_TXCLK1N L22 HT_CLKIN1_N 8
8 HT_CLKOUT0_P Y24 HT_RXCLK0P HT_TXCLK0P J24 HT_CLKIN0_P 8
8 HT_CLKOUT0_N W25 HT_RXCLK0N HT_TXCLK0N J25 HT_CLKIN0_N 8
8 HT_CTLOUT0_P P24 HT_RXCTLP HT_TXCTLP N23 HT_CTLIN0_P 8
8 HT_CTLOUT0_N P25 HT_RXCTLN HT_TXCTLN P23 HT_CTLIN0_N 8
R193 49.9-1-04
HT_RXCALP A24 C25 HT_TXCALP R201 100-1-04
20051008 R200 49.9-1-04
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
VDDHT_PKG C24 HT_RXCALN HT_TXCALN D24
20050930
RS485
2 2
20050927
VCC1.2 C544 1 2 .1U-04-O VCORE
VCC3 C545 1 2 .1U-04-O VCORE
HT link stitching caps
20060303
FOR EMI.
1 1
Elitegroup Computer system
Title
NB:ATI RS485/690 HT LINK I/F
Size Document Number Rev
C 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 15 of 35
A B C D E
A B C D E
20050927
U10B
19 GFX_RX0P G5 PART 2 OF 5 J1 GFX_TX0P
GFX_RX0P GFX_TX0P GFX_TX0P 19
19 GFX_RX0N G4 H2 GFX_TX0N
GFX_RX0N GFX_TX0N GFX_TX0N 19
19 GFX_RX1P J8 K2 GFX_TX1P
GFX_RX1P GFX_TX1P GFX_TX1P 19
19 GFX_RX1N J7 K1 GFX_TX1N
GFX_RX1N GFX_TX1N GFX_TX1N 19
19 GFX_RX2P J4 K3 GFX_TX2P
GFX_RX2P GFX_TX2P GFX_TX2P 19
19 GFX_RX2N J5 L3 GFX_TX2N
GFX_RX2N GFX_TX2N GFX_TX2N 19
19 GFX_RX3P L8 L1 GFX_TX3P
GFX_RX3P GFX_TX3P GFX_TX3P 19
19 GFX_RX3N L7 L2 GFX_TX3N
GFX_RX3N GFX_TX3N GFX_TX3N 19
19 GFX_RX4P L4 N2 GFX_TX4P
GFX_RX4P GFX_TX4P GFX_TX4P 19
4
19 GFX_RX4N L5 N1 GFX_TX4N 4
GFX_RX4N GFX_TX4N GFX_TX4N 19
19 GFX_RX5P M8 P2 GFX_TX5P
GFX_RX5P GFX_TX5P GFX_TX5P 19
M7 P1 GFX_TX5N
PCIE GFX I/F
19 GFX_RX5N GFX_RX5N GFX_TX5N GFX_TX5N 19
19 GFX_RX6P M4 P3 GFX_TX6P
GFX_RX6P GFX_TX6P GFX_TX6P 19
19 GFX_RX6N M5 R3 GFX_TX6N
GFX_RX6N GFX_TX6N GFX_TX6N 19
19 GFX_RX7P P8 R1 GFX_TX7P
GFX_RX7P GFX_TX7P GFX_TX7P 19
19 GFX_RX7N P7 R2 GFX_TX7N
GFX_RX7N GFX_TX7N GFX_TX7N 19
19 GFX_RX8P P4 T2 GFX_TX8P
GFX_RX8P GFX_TX8P GFX_TX8P 19
19 GFX_RX8N P5 U1 GFX_TX8N
GFX_RX8N GFX_TX8N GFX_TX8N 19
19 GFX_RX9P R4 V2 GFX_TX9P
GFX_RX9P GFX_TX9P GFX_TX9P 19
19 GFX_RX9N R5 V1 GFX_TX9N
GFX_RX9N GFX_TX9N GFX_TX9N 19
19 GFX_RX10P R7 V3 GFX_TX10P
GFX_RX10P GFX_TX10P GFX_TX10P 19
19 GFX_RX10N R8 W3 GFX_TX10N
GFX_RX10N GFX_TX10N GFX_TX10N 19
19 GFX_RX11P U4 W1 GFX_TX11P
GFX_RX11P GFX_TX11P GFX_TX11P 19
19 GFX_RX11N U5 W2 GFX_TX11N
GFX_RX11N GFX_TX11N GFX_TX11N 19
19 GFX_RX12P W4 Y2 GFX_TX12P
GFX_RX12P GFX_TX12P GFX_TX12P 19
19 GFX_RX12N W5 AA1 GFX_TX12N
GFX_RX12N GFX_TX12N GFX_TX12N 19
19 GFX_RX13P Y4 AA2 GFX_TX13P
GFX_RX13P GFX_TX13P GFX_TX13P 19
19 GFX_RX13N Y5 AB2 GFX_TX13N
GFX_RX13N GFX_TX13N GFX_TX13N 19
19 GFX_RX14P V9 AB1 GFX_TX14P
GFX_RX14P GFX_TX14P GFX_TX14P 19
19 GFX_RX14N W9 AC1 GFX_TX14N
GFX_RX14N GFX_TX14N GFX_TX14N 19
19 GFX_RX15P AB7 AE3 GFX_TX15P
GFX_RX15P GFX_TX15P GFX_TX15P 19
19 GFX_RX15N AB6 AE4 GFX_TX15N
GFX_RX15N GFX_TX15N GFX_TX15N 19
19 GPP_RX0P AA11 AD7 C152 1 2 .1U-04
GPP_RX2P GPP_TX2P GPP_TX0P 19
19 GPP_RX0N AB11 AE7 C158 1 2 .1U-04
GPP_RX2N GPP_TX2N GPP_TX0N 19
W11 GPP_RX3P GPP_TX3P AD8
20050922 W12 AE8
3
GPP_RX3N GPP_TX3N 20050922
3
PCIE I/F GPP GPP_TX0P_C
20 A_RX2P Y7 GPP_RX0P GPP_TX0P AD4
FOR 690. AA7 AE5 GPP_TX0N_C
20 A_RX2N GPP_RX0N GPP_TX0N C368 1 2 .1U-04-O
20051007 A_TX2P 20FOR 690.
C369 1 2 .1U-04-O A_TX2N 20
20 A_RX3P AB9 AD5 GPP_TX1P_C
FOR 690. GPP_RX1P GPP_TX1P GPP_TX1N_C
20 A_RX3N AA9 GPP_RX1N GPP_TX1N AD6
C345 1 2 .1U-04-O A_TX3P 20FOR 690.
C346 1 2 .1U-04-O A_TX3N 20
20 A_RX0P W14 AE9 A_TX0P_C C378 1 2 .1U-04
SB_RX0P SB_TX0P A_TX0P 20
20 A_RX0N W15 AD10 A_TX0N_C C380 1 2 .1U-04
SB_RX0N SB_TX0N A_TX0N 20
20 A_RX1P AA12 PCIE I/F SB AC8 A_TX1P_C C370 1 2 .1U-04
SB_RX1P SB_TX1P A_TX1P 20
20 A_RX1N AB12 AD9 A_TX1N_C C372 1 2 .1U-04
Rx SB_RX1N SB_TX1N Rz A_TX1N 20
R261 10K-1-04 AA14 AD11 R263 150-1-04
R262 8.25K-1-04 AB14 PCEH_ISET PCEH_PCAL R264 82.5-1-04
PCEH_TXISET PCEH_NCAL AE11 VDDA12_PKG2
20051003
Rw Ry
RS485
AVIOD STUB AVIOD STUB
RS690/485 2/4-LANE ALINK CONFIGURATION RS690/485 2/4-LANE ALINK CONFIGURATION
2 2
RS690/RS485 CHANGE TABLE
NB/DIFF Rw Rx Ry Rz
RS690 DNI 1.47K 2K 562R
RS485 8.25K 10K 82.5R 150R
1 1
Elitegroup Computer system
Title
NB:ATI RS485/690 PCI-E I/F
Size Document Number Rev
C 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 16 of 35
A B C D E
A B C D E
VCC3
FB36 FB600P-08 AVDD
C173
4.7U-08
VCC1.8
U10C
R195 0 AVDDDI
1
4 4
B22 AVDD1 TXOUT_L0P B14
C181 C22 PART 3 OF 5 B15
1U AVDD2 TXOUT_L0N
G17 B13
2
VCC1.8 AVSSN1 TXOUT_L1P
H17 AVSSN2 TXOUT_L1N A13
A20 AVDDDI TXOUT_L2P H14
FB42 1 2 FB120 AVDDQ B20 G14
AVSSDI TXOUT_L2N
1
TXOUT_L3P D17
C178 C184
CRT/TVOUT
A21 AVDDQ TXOUT_L3N E17
1U .1U-04 A22
2
AVSSQ
TXOUT_U0P A15
26 C C21 C_R TXOUT_U0N B16
26 Y C20 Y_G TXOUT_U1P C17
COMP D19 C18
26 COMP COMP_B TXOUT_U1N
TXOUT_U2P B17
26 R E19 RED TXOUT_U2N A17
R180 R198 R199 F19 A18
26 G GREEN TXOUT_U3P
R230-R232 PLACED 150-1-04 150-1-04 150-1-04 G19 B18
26 B BLUE TXOUT_U3N
WITHIN 1' OF NB 26 VSYNC_ C6
20060221 DACVSYNC
A5 E15
LVTM
26 HSYNC_ DACHSYNC TXCLK_LP
TXCLK_LN D15
R181 715-1 B21 H15
RSET TXCLK_UP VCC1.8
TXCLK_UN G15
R196 0-04 B6 FB38 1 2 FB120
VCC1.8 26 DAC_SCL DACSCL
R197 0-04 A6 D14 LPVDD
26 DAC_SDAT DACSDA LPVDD 20051003
E14 C174
FB40 1 LPVSS
2 FB120 PLLVDD A10 .1U-04
PLL PWR
FB41 1 PLLVDD 20051003
2 FB120 B10 PLLVSS LVDDR18D_1 A12 LVDDR18D
20050930 B12 FB43 1 2 FB120
LVDDR18D_2
1
1
VCC3 HTPVDD B24 C12 LVDDR18A
3
VCC1.8 HTPVDD LVDDR18A_1 3
C179 C175 C176 C180 B25 HTPVSS LVDDR18A_2 C13 FB35 1 2 FB120 FOR RS485
R182 4.7U-08 1U 4.7U-08 1U FB37 1 * 2 FB120-O FOR RS690 VCC3
20051003
2
2
4.7K-04 C10 A16
24 -PCI_RSTX SYSRESET# LVSSR1
R179 C11 A14 C172 C183
6 NB_PWRGD
B
POWERGOOD LVSSR3
1K-04 LDT_STOP_NB- .1U-04 20051003
PM
C5 LDTSTOP# LVSSR5 D12 .1U-04
B5 C19 20051003
20 ALLOW_LDTSTOP ALLOW_LDTSTOP LVSSR6
7,20,21 LDT_STOP- E C LVSSR7 C15
R183 10K-04 C23 C16
Q37 HTTSTCLK LVSSR8
3 HTREFCLK B23 HTREFCLK
2N3904
C2 F14
CLOCKs
19 TVCLKIN TVCLKIN LVSSR12
LVSSR13 F15
3 NB_OSC B11 OSCIN
VCC1.2 FB39 1 2 FB120-O A11 OSCOUT
1
3 NBSRC_CLKP F2 GFX_CLKP
FOR RS690 C177 E1 E12
20050930 1U-O 3 NBSRC_CLKN GFX_CLKN LVDS_DIGON TMDS_HPD2 19
G12 STP5
2
LVDS_BLON
3 SBLINK_CLKP G1 SB_CLKP LVDS_BLEN F12 STP4
3 SBLINK_CLKN G2 SB_CLKN
DVO_D0 AD14 TP57
R186 2.7K-04-O DFT_GPIO0 D6 AD15
20051220 DFT_GPIO0 DVO_D1 TP59 20051005
LOAD_ROM#:LOAD ROM STRAP ENABLE R189 2.7K-04 LOAD_ROM- D7 AE15
R192 2.7K-04-O DFT_GPIO2 DFT_GPIO1 DVO_D2
C8 DFT_GPIO2 DVO_D3 AD16 TP62
R184 2.7K-04-O DFT_GPIO3 C7 AE16
DFT_GPIO3 DVO_D4 TP60
R190 2.7K-04-O DFT_GPIO4 B8 AC17
R191 2.7K-04-O
DFT_GPIO5 DFT_GPIO4 DVO_D5
A8 DFT_GPIO5 DVO_D6 AD18
MIS.
AE19
DVO
2 DVO_D7 2
20 BMREQ- B2 BMREQb DVO_D8 AD19
I2C_CLK A2 AE20
19 I2C_CLK I2C_DATA I2C_CLK DVO_D9
STP3 B4 I2C_DATA DVO_D10 AD20
STP25 AA15 THERMALDIODE_P DVO_D11 AE21
20050923 AB15
STP31 THERMALDIODE_N
DVO_VSYNC AD13
STP1 C14 TMDS_HPD DVO_DE AC13
19 DDC_DATA B3 DDC_DATA DVO_HSYNC AE13
C3 TESTMODE DVO_IDCKP AE17
STRP_DATA A3 AD17
STP2 STRP_DATA DVO_IDCKN
R187 RS485
4.7K-04
VCC3
20051005
R188 R194
4.7K-04 4.7K-04
1 1
I2C_CLK
20051003 I2C_DATA
Elitegroup Computer system
Title
NB: ATI RS485/690 SYSTEM I/F
Size Document Number Rev
C 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 17 of 35
A B C D E
A B C D E
AC10
AE10
AC4
AC9
AD3
AC7
AC6
AC5
AD1
AC2
AE6
AA3
Y15
Y14
Y12
Y11
V15
V14
V11
V12
W6
M3
M6
M2
G6
G3
R9
U6
U3
U2
R6
N3
H3
H1
P9
Y9
Y3
Y1
P6
A1
T3
T1
F1
F3
L6
J3
J6
J2
U10E
VSSA51
VSSA50
VSSA49
VSSA48
VSSA47
VSSA46
VSSA45
VSSA44
VSSA43
VSSA42
VSSA41
VSSA40
VSSA39
VSSA38
VSSA37
VSSA95
VSSA94
VSSA93
VSSA36
VSSA35
VSSA34
VSSA33
VSSA32
VSSA30
VSSA28
VSSA27
VSSA26
VSSA25
VSSA24
VSSA22
VSSA21
VSSA20
VSSA19
VSSA18
VSSA17
VSSA16
VSSA15
VSSA13
VSSA11
VSSA10
VSSA9
VSSA8
VSSA7
VSSA6
VSSA5
VSSA4
VSSA3
VSSA2 PAR 5 OF 5
4 4
RS485
GROUND
VSS62
VSS61
VSS60
VSS59
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
B7
H12
AC16
M13
D4
F17
AC15
A23
M17
H23
R17
AE14
T25
T23
AE22
C4
R23
AC22
AC14
G24
D25
AC23
Y22
W24
H25
U20
AD25
Y25
W23
R20
R14
R12
P15
P20
P13
L24
N14
N12
M25
M23
M20
M11
L23
L20
L14
L12
J12
G23
J22
M15
AE18
R24
P11
Y23
G11
E9
D23
F11
A25
CURRENT MEASUREMENT
VCC1.2
VCC1.2 U10D
VDD_HT
AE24 VDD_HT1 PART 4 OF 5 VDDA_12_1 D1
AD24 VDD_HT2 VDDA_12_2 G7
1
1
1
AD22 E2 SC32 SC19
VDD_HT5 VDDA_12_3
1
1
1
1
1
SC34 SC23 AB17 C1 SC2 SC12 SC4
3
C236 C242 SC5 C237 SC26 VDD_HT6 VDDA_12_4 1U 1U 1U 10U-08 10U-08
3
AE23 E3
2
2
2
10U-08 10U-08 1U 1U 1U 1U 1U VDD_HT9 VDDA_12_5
Y17 D2
2
2
2
2
2
VDD_HT10 VDDA_12_6
W17 VDD_HT11 VDDA_12_7 M9
AC18 VDD_HT12 VDDA_12_8 F4
AD21 VDD_HT13 VDDA_12_9 B1
VCC1.8 AC19 D3
FB34 FB600P-08 VDD_HT14 VDDA_12_10
AC20 VDD_HT15 VDDA_12_11 L9
AB19 E6 VCC_NB
VDD_HT16 VDDA_12_12
1
1
AD23 VDD_HT17
ATi : 2.2U C170 C167 AA17 L11
1U 1U VDD_HT18 VDDC_1
AE25 L13
2
2
VDD_HT19 VDDC_2
1
1
1
1
1
1
* RS690: VDDA18=1.2V L15 SC6 SC16
VDD18 VDDC_3 SC10 SC8 SC9 SC7 SC14 SC15
** RS485: VDDA18=1.8V J14 VDD18_1 VDDC_4 M12
J15 R15 .1U .1U .1U .1U .1U .1U 10U-08 10U-08
POWER
2
2
2
2
2
2
VCC1.8 VDD18_2 VDDC_5
VDDC_6 M14
** FB45 FB600P-08 AE2 VDDA18_1 VDDC_7 N11
AB3 VDDA18_2 VDDC_8 N13
1
1
1
1
SC29 SC33 U7 N15
VCC1.2 SC17 SC18 SC22 SC13 VDDA18_3 VDDC_9
W7 VDDA18_4 VDDC_10 J11
* FB46 FB600P-08-O 10U-08 10U-08 1U 1U 1U 1U AB4 H11
2
2
2
2
VDDA18_5 VDDC_11
AC3 VDDA18_6 VDDC_12 P12
AD2 VDDA18_7 VDDC_13 P14
AE1 VDDA18_8 VDDC_14 R11
VCC3 VDDR3 R13
FB33 FB600P-08 VDDC_15
E11 VDDR3_2 VDDC_16 A19
D11 B19
VDDR3_1 VDDC_17
VDDC_18 U11 NB RS485 POWER STATES
C165 AC12 U14 Power Signal S0 S1 S3 S4/S5 G3
2
4.7U-08 VDDR_1 VDDC_19 2
AD12 VDDR_2 VDDC_20 P17
AE12 VDDR_3 VDDC_21 L17 VDDHT ON ON OFF OFF OFF
VDDC_22 J19
VCC1.8 E7 D20 VDDR,VDDRCK ON ON ON OFF OFF
VDDA12/VDDPLL_1 VDDC_23
F7 VDDA12/VDDPLL_2 VDDC_24 G20
FB47 FB600P-08 F9 A9 VDD18 ON ON OFF OFF OFF
VSSA12/VSSPLL_1 VDDC_25
G9 VSSA12/VSSPLL_2 VDDC_26 B9
1
1
1
VDDC_27 C9 VDDC ON ON OFF OFF OFF
C243 C233 C239 VDDHT_PKG D22 D9
1U 1U 1U VDDHT_PKG VDDC_28
VDDA12_PKG1 M1 A7 VDDA18 ON ON OFF OFF OFF
2
2
2
VDDA12_PKG1 VDDC_29
VDDA12_PKG2 AC11 VDDA12_PKG2 VDDC_30 A4
VDDC_31 U12 VDDA12 ON ON OFF OFF OFF
20051003 U15
VCC1.2 VDDC_32
AVDD ON ON OFF OFF OFF
SC11 RS485
SR1 0 10U-08 AVDDDI ON ON OFF OFF OFF
1
Re: Re PLLVDD ON ON OFF OFF OFF
SC1 SC3
RS485: 0 Ohm RESISTOR 4.7U-08 1U HTPVDD ON ON OFF OFF OFF
2
RS690: 220 Ohm 500mA FERRITE BEAD
VDDR3 ON ON OFF OFF OFF
LPVDD ON ON OFF OFF OFF
LVDDR18D ON ON OFF OFF OFF
LVDDR18A ON ON OFF OFF OFF
1 1
Elitegroup Computer System
Title
NB RS485/690 POWER
Size Document Number Rev
C 1.0
RS485M-M
Date: Friday, April 07, 2006 Sheet 18 of 35
A B C D E
A B C D E
PCI_EXPRESS_x16
+12V:5.5Amp
PLACE THESE CAP
CLOSE TO CONNECTOR PCIEX16 VCC3 20060222
VCC3 +12V +12V
3VSB PCI_Express_x16
B1 +12V PRSNT1# A1
B2 A2 VCC3
4 +12V +12V RN39 4
B3 +12V +12V A3
B4 A4 4.7K-8P4R-04
GND GND
3,11,12,21,24,26 SMBCK B5 SMCLK JTAG2 A5 4 5
3,11,12,21,24,26 SMBDT B6 SMDAT JTAG3 A6 3 6
B7 A7 2 7 +12V +12V 3VSB
GND JTAG4 PCE1-B9 1 VCC3
B8 +3.3 JTAG5 A8 8
20060222 PCE1-B9 B9 A9 PCIEX1 VCC3
JTAG1 +3.3V
B10 3.3VAUX +3.3V A10 A1 PRSNT1# +12V#B1 B1
-PCIE_WAKE_UP B11 A11 20060222 A2 B2
21 -PCIE_WAKE_UP WAKE# PERST# -PCI_RSTW 24 VCC3 RN40 +12V#A2 +12V#B2
A3 +12V#A3 RSVD#B3 B3
Mechanical Key 4.7K-8P4R-04 A4 B4
GND#A4 GND#B4
B12 RSVD GND A12 4 5 A5 JTAG2 SMCLK B5 SMBCK 3,11,12,21,24,26
B13 GND REFCLK+ A13 GFX_CLKP 3 3 6 A6 JATG3 SMDAT B6 SMBDT 3,11,12,21,24,26
16 GFX_TX0P C157 .1U-04 PE0TX_0+ B14 A14 2 7 A7 B7
PETP0 REFCLK- GFX_CLKN 3 JATG4 GND#B7
16 GFX_TX0N C151 .1U-04 PE0TX_0- B15 A15 1 8 PCE2-B9 A8 B8
PETN0 GND JATG5 +3.3V#B8 PCE2-B9 20060222
B16 GND PERP0 A16 GFX_RX0P 16 A9 +3.3V#A9 JTAG1 B9
17 I2C_CLK B17 PRSNT2# PERN0 A17 GFX_RX0N 16 A10 +3.3V#A10 3.3Vaux B10
B18 A18 -PCI_RSTW R162 0-04 A11 B11 -PCIE_WAKE_UP 21
GND GND PERST# WAKE#
C159 .1U-04 PE0TX_1+ End of the x1 Connector Mechanical Key
16 GFX_TX1P B19 PETP1 RSVD A19 A12 GND#A12 RSVD#B12 B12
16 GFX_TX1N C160 .1U-04 PE0TX_1- B20 A20 3 GPP_CLK0P A13 B13
PETN1 GND REFCLK+ GND#B13
B21 GND PERP1 A21 GFX_RX1P 16 3 GPP_CLK0N A14 REFCLK- PETp0 B14 GPP_TX0P 16
B22 GND PERN1 A22 GFX_RX1N 16 A15 GND#A15 PETn0 B15 GPP_TX0N 16
16 GFX_TX2P C161 .1U-04 PE0TX_2+ B23 A23 16 GPP_RX0P A16 B16
C162 .1U-04 PE0TX_2- PETP2 GND PERp0 GND#B16 20051005
16 GFX_TX2N B24 PETN2 GND A24 16 GPP_RX0N A17 PERn0 PRSNT2#B17 B17
B25 GND PERP2 A25 GFX_RX2P 16 A18 GND#A18 GND#B18 B18
B26 A26 20051005
GND PERN2 GFX_RX2N 16
16 GFX_TX3P C168 .1U-04 PE0TX_3+ B27 A27
C171 .1U-04 PE0TX_3- PETP3 GND CONN_PCIE_X1-36
3 16 GFX_TX3N B28 PETN3 GND A28 3
B29 GND PERP3 A29 GFX_RX3P 16
B30 RSVD PERN3 A30 GFX_RX3N 16
B31 PRSNT2#- GND A31
17 DDC_DATA B32 A32
GND RSVD +12V 3VSB
C182 .1U-04 PE0TX_4+ B33 End of the x4 Connector
A33 VCC3
16 GFX_TX4P PETP4 RSVD
16 GFX_TX4N C185 .1U-04 PE0TX_4- B34 A34
PETN4 GND
B35 GND PERP4 A35 GFX_RX4P 16
1
B36 A36 GFX_RX4N 16 TC12
C186 .1U-04 PE0TX_5+ GND PERN4 C117 C112 C139
16 GFX_TX5P B37 PETP5 GND A37
16 GFX_TX5N C187 .1U-04 PE0TX_5- B38 A38 C220 C142 C127 C147 470U/16V-O .1U-04 .1U-04 .1U-04
2
PETN5 GND .1U-04 .1U-04 .1U-04 .1U-04
B39 GND PERP5 A39 GFX_RX5P 16
B40 A40 20060221
GND PERN5 GFX_RX5N 16
16 GFX_TX6P C190 .1U-04 PE0TX_6+ B41 A41
C191 .1U-04 PE0TX_6- PETP6 GND
16 GFX_TX6N B42 PETN6 GND A42
B43 GND PERP6 A43 GFX_RX6P 16
B44 GND PERN6 A44 GFX_RX6N 16
16 GFX_TX7P C192 .1U-04 PE0TX_7+ B45 A45
C193 .1U-04 PE0TX_7- PETP7 GND
16 GFX_TX7N B46 PETN7 GND A46
B47 GND PERP7 A47 GFX_RX7P 16
17 TVCLKIN B48 PRSNT2#_ PERN7 A48 GFX_RX7N 16
B49 GND GND A49
C200 .1U-04 PE0TX_8+ End of the x8 Connector
16 GFX_TX8P B50 PETP8 RSVD A50
16 GFX_TX8N C206 .1U-04 PE0TX_8- B51 A51
PETN8 GND
B52 GND PERP8 A52 GFX_RX8P 16
B53 GND PERN8 A53 GFX_RX8N 16
16 GFX_TX9P C209 .1U-04 PE0TX_9+ B54 A54
2
C211 .1U-04 PE0TX_9- PETP9 GND 2
16 GFX_TX9N B55 PETN9 GND A55
B56 GND PERP9 A56 GFX_RX9P 16
B57 GND PERN9 A57 GFX_RX9N 16
16 GFX_TX10P C217 .1U-04 PE0TX_10+ B58 A58
C219 .1U-04 PE0TX_10- PETP10 GND
16 GFX_TX10N B59 PETN10 GND A59
B60 GND PERP10 A60 GFX_RX10P 16
B61 GND PERN10 A61 GFX_RX10N 16
16 GFX_TX11P C225 .1U-04 PE0TX_11+ B62 A62
C231 .1U-04 PE0TX_11- PETP11 GND
16 GFX_TX11N B63 PETN11 GND A63
B64 GND PERP11 A64 GFX_RX11P 16
B65 GND PERN11 A65 GFX_RX11N 16
16 GFX_TX12P C235 .1U-04 PE0TX_12+ B66 A66
C240 .1U-04 PE0TX_12- PETP12 GND
16 GFX_TX12N B67 PETN12 GND A67
B68 GND PERP12 A68 GFX_RX12P 16
B69 GND PERN12 A69 GFX_RX12N 16
16 GFX_TX13P C244 .1U-04 PE0TX_13+ B70 A70
C247 .1U-04 PE0TX_13- PETP13 GND
16 GFX_TX13N B71 PETN13 GND A71
B72 GND PERP13 A72 GFX_RX13P 16
B73 GND PERN13 A73 GFX_RX13N 16
16 GFX_TX14P C252 .1U-04 PE0TX_14+ B74 A74
C253 .1U-04 PE0TX_14- PETP14 GND
16 GFX_TX14N B75 PETN14 GND A75
B76 GND PERP14 A76 GFX_RX14P 16
B77 GND PERN14 A77 GFX_RX14N 16
16 GFX_TX15P C255 .1U-04 PE0TX_15+ B78 A78
C258 .1U-04 PE0TX_15- PETP15 GND
16 GFX_TX15N B79 PETN15 GND A79
B80 GND PERP15 A80 GFX_RX15P 16
17 TMDS_HPD2 TMDS_HPD2 B81 A81
PRSNT2#! PERN15 GFX_RX15N 16
B82 RSVD GND A82
1 1
End of the x16 Connector
SLOT-PCIEX16
+12V Please move to PCIEX16. VCC3 3VSB
Elitegroup Computer system
1
1
1
TC11 TC14 TC15 Title
C119 C111 C143 C188 C141
470U/16V .1U-04 .1U-04 .1U-04 .1U-04 .1U-04 PCI EXPRESS x16 SLOTS
2
2
2
1000U/6.3V-O 22U/25V-O Size Document Number Rev
C
RS485M-M 1.0
Date: Friday, April 07, 2006 Sheet 19 of 35
A B C D E
5 4 3 2 1
20051008 20060222
R449 4.7K-04 U18A RN41 33-8P4R-04
R428 33-04 AG10
SB600 SB 23x23mm U2 CLK_0 CLK_LAN
4
3
5
6
24 -A_RST A_RST# PCICLK0 PCLK_LAN 23,30
Part 1 of 4 T2 CLK_1 CLK_1 2 7
PCICLK1 20051031 PCLK_1 23,25
CLK_2 CLK_2
PCI CLKS
3 SBSRC_CLKP J24 PCIE_RCLKP PCICLK2 U1 1 8 PCLK_2 23,26
J25 V2 CLK_ROM CLK_0 4 5 20050926
3 SBSRC_CLKN PCIE_RCLKN PCICLK3 PCLK_0 23,25
W3 CLK_1394 CLK_1394 3 6
PCICLK4 PCLK_1394 23,31
C385 1 2 .1U-04 P29 U3 CLK_LAN CLK_SIO 2 7
16 A_RX0P PCIE_TX0P PCICLK5 PCLK_SIO 23,24
C387 1 2 .1U-04 P28 V1 CLK_SIO CLK_ROM 1 8
16 A_RX0N PCIE_TX0N PCICLK6 PCLK_ROM 23,24
C384 1 2 .1U-04 M29 T1 RN42 33-8P4R-04
16 A_RX1P PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41
C381 1 2 .1U-04 M28 R374 0-04 FOR SB460, THIS BALL IS SPDIF_OUT/GPIO41 ONLY
16 A_RX1N PCIE_TX1N SB_SPDIF_OUT 23
C377 1 2 .1U-04-O K29 AJ9 R427 33-04
D 16 A_RX2P PCIE_TX2P PCIRST# -PCI_RST 25 D
C376 1 2 .1U-04-O K28
16 A_RX2N PCIE_TX2N AD[31..0]
PLACE PCIE CAPS C375 1 2 .1U-04-O H29
16 A_RX3P PCIE_TX3P AD[31..0] 23,25,30,31
CLOSE TO U600 16 C373 1 2 .1U-04-O H28 W7 AD0
A_RX3N 20051122 PCIE_TX3N AD0/ROMA18
Y1 AD1
AD1/ROMA17 AD2 R438 4.7K-04
SB CALIBRATION RESISITOR VALUE 16 A_TX0P T25 PCIE_RX0P AD2/ROMA16 W8
16 A_TX0N T26 W5 AD3 PCLK_LAN C556 1 2 22P-04
PCIE_RX0N AD3/ROMA15 AD4 20051008 PCLK_1 C555 1
SB600 SB460 2 22P-04
PCI EXPRESS INTERFACE
16 A_TX1P T22 PCIE_RX1P AD4/ROMA14 AA5
16 A_TX1N T23 Y3 AD5 PCLK_SIO C554 1 2 22P-04
PCIE_RX1N AD5/ROMA13 AD6
Ra 562 OHM 1% 150 OHM 1% 16 A_TX2P M25 PCIE_RX2P AD6/ROMA12 AA6
M26 AC5 AD7 20060403
16 A_TX2N PCIE_RX2N AD7/ROMA11
2.05K 1% 150 OHM 1% M22 AA7 AD8
Rb 16 A_TX3P PCIE_RX3P AD8/ROMA9 AD9
16 A_TX3N M23 PCIE_RX3N AD9/ROMA8 AC3
DNI 4.12K 1% AC7 AD10
Rc R347 150-1-04 Ra AD10/ROMA7 AD11
E29 PCIE_CALRP AD11/ROMA6 AJ7
PCIE_VDDR R353 150-1-04 Rb E28 AD4 AD12
PCIE_CALRN AD12/ROMA5 AD13
AD13/ROMA4 AB11
VCC1.2 FB59 FB600P-08-O R351 4.12K-1 Rc E27 AE6 AD14
PCIE_CALI AD14/ROMA3 AD15
AD15/ROMA2 AC9
VCC1.8 FB60 FB600P-08 U29 AA3 AD16
PCIE_PVDD AD16/ROMD0 AD17
AD17/ROMD1 AJ4
1
20050920 U28 AB1 AD18
C388 C390 PCIE_PVSS AD18/ROMD2 AD19
AD19/ROMD3 AH4
10U-08 1U PCIE_VDDR F27 AB2 AD20
2
PCIE_VDDR_1 AD20/ROMD4 AD21
FOR SB600 VCC_SB= 1.2V F28
F29
PCIE_VDDR_2
PCIE_VDDR_3
AD21/ROMD5
AD22/ROMD6
AJ3
AB3 AD22
G26 AH3 AD23
FOR SB460 VCC_SB= 1.8V G27
PCIE_VDDR_4
PCIE_VDDR_5
AD23/ROMD7
AD24 AC1 AD24
AD25
G28 PCIE_VDDR_6 AD25 AH2
G29 AC2 AD26
PCIE_VDDR_7 AD26 AD27
C J27 PCIE_VDDR_8 AD27 AH1 C
J29 AD2 AD28
PCI INTERFACE
FB56 FB600P-08-O PCIE_VDDR PCIE_VDDR_9 AD28 AD29
VCC1.2 L25 PCIE_VDDR_10 AD29 AG2
L26 AD1 AD30
FB58 FB600P-08 PCIE_VDDR_11 AD30 AD31 C_-BE[3..0]
VCC1.8 L29 PCIE_VDDR_12 AD31 AG1 C_-BE[3..0] 25,30,31
N29 AB9 C_-BE0
PCIE_VDDR_13 CBE0#/ROMA10
1
1
1
1
1
20050920 AF9 C_-BE1
C379 C382 SC60 SC64 SC62 SC68 CBE1#/ROMA1 C_-BE2 VCC3
CBE2#/ROMWE# AJ5
10U-08 1U 1U 1U 1U 1U AG3 C_-BE3
2
2
2
2
2
CBE3# -REQ0
FRAME# AA2 -FRAME 25,30,31 1 2 RN11
AH6 20050930 -REQ3 3 4 8.2K-8P4R
DEVSEL#/ROMA0 -DEVSEL 25,30,31
AG5 -REQ4 5 6
IRDY# -IRDY 25,30,31
AA1 -GNT2 7 8
TRDY#/ROMOE# -TRDY 25,30,31
AF7 -GNT0 1 2 RN10
PAR/ROMA19 PAR 25,30,31
Y2 -REQ2 3 4 8.2K-8P4R
STOP# -STOP 25,30,31
AG8 -GNT1 5 6
PERR# -PERR 25,30,31
AC11 -REQ1 7 8
SERR# -SERR 25,30
32K_X1 AJ8 -REQ0 -GNT3 R453 8.2K-04
REQ0# -REQ0 25
X4 AE2 -REQ1 -GNT4 R425 8.2K-04
REQ1# -REQ1 25
32.768KHZ AG9 -REQ2
REQ2# -REQ2
1 2 32K_X2 AH8 -REQ3
REQ3#/GPIO70 -REQ3 30
3 4 AH5 -REQ4
REQ4#/GPIO71 -REQ4 31
R344 AD11 -GNT0
GNT0# -GNT0 25
20M AF2 -GNT1
GNT1# -GNT1 25
AH7 -GNT2
GNT2# -GNT2
AB12 -GNT3 SB460 ONLY
GNT3#/GPIO72 -GNT3 30
R345 5.1M AG4 -GNT4
GNT4#/GPIO73 -GNT4 31 20060227
AG7 -CLKRUN
CLKRUN#
1
1
AF6 VCC3
C337 C354 LOCK# -PLOCK 25 -LPC_DRQ1
B
4 5 B
22P-04 22P-04 AD3 SERIRQ 3 6 RN43
2
2
20060221 20060221 INTE#/GPIO33 -INTE 25 20060306 -LPC_DRQ0
INTF#/GPIO34 AF1 -INTF 25 2 7 10K-8P4R-04
INTG#/GPIO35 AF4 -INTG 25,30 1 8
32K_X1 D2 AF3 LPC_AD0 4 5
X1 INTH#/GPIO36 -INTH 25,31 LPC_AD2 3 6 RN44
PLACE THESE COMPONENTS CLOSE TO U600, AND 20060306 LPC_AD1 2 7 100K-8P4R-04
USE GROUND GUARD FOR 32K_X1 AND 32K_X2 XTAL LPC_AD3 1 8
32K_X2 C1 -CLKRUN R426 10K-04
X2 LPC_AD0
LAD0 AG24 LPC_AD0 24,26
SB600_CPU_PWRGD AC26 AG25 LPC_AD1 LPC_AD1 24,26
CPU_PG/LDT_PG LAD1 LPC_AD2
W26 INTR/LINT0 LAD2 AH24
LPC_AD3
LPC_AD2 24,26
20051122
LPC PULL UPS VCC3
W24 NMI/LINT1 LAD3 AH25 LPC_AD3 24,26
W25 AF24 -LPC_FRAME
INIT# LFRAME# -LPC_FRAME 23,24,26
LPC
FOR SB600 AA24 AJ24 -LPC_DRQ0 BMREQ- R595 10K-04-O
SMI# LDRQ0# -LPC_DRQ0 24
R396 0-04-O AA23 AH26 -LPC_DRQ1
7,17,21 LDT_STOP- SLP#/LDT_STP# LDRQ1#/GNT5#/GPIO68 FOR SB600, THIS BALL IS LDRQ1 ONLY
7 CPU_SIC AA22 IGNNE#/SIC BMREQ#/REQ5#/GPIO65 W22 BMREQ- 17 FOR SB460, THIS BALL IS BMREQ# ONLY
7 SB_CPUPWRGD R394 0-04-O SB600_CPU_PWRGD AA26 AF23 SERIRQ
7 CPU_SID A20M#/SID SERIRQ SERIRQ 24,26
CPU
CPU_PWR_SB R185 10K-04-O Y27
20051110 FOR SB600 FERR# VBAT
17 ALLOW_LDTSTOP AA25 STPCLK#/ALLOW_LDTSTP RTCCLK D3 RTC_CLK 23
R310 0-04 20051008 AH9 F5
SB460_CPU_PWRGD 21 CPU_STP#/DPSLP_3V# RTC_IRQ#/GPIO69 -RTC_IRQ 23
B24 DPSLP_OD#/GPIO37 1
20050930 20050926 W23 E1 VBAT_IN R435 1K 2
RTC
P
DPRSLPVR VBAT BT1
7 LDT_RST- AC25 LDT_RST#/DPRSTP#/PROCHOT# RTC_GND D1 3
1
VBAT_IO C400
C356 C355 CLR_CMOS .1U-04
SB600 IXP600 A11, LF 1U .1U-04 H3X1-R SOCK-CR2032
N
2
A A
Elitegroup Computer Systems
1-2: NORMAL
Title
2-3: CMOS CLEAR
SB600 PCIE/ PCI/ CPU/ LPC
Size Document Number Rev
Custom
RS485M-M 1.0
Date: Friday, April 07, 2006 Sheet 20 of 35
5 4 3 2 1
