MS -7050-130
MS -7050-130
5 4 3 2 1
Collected by:
MSI Digitally signed by fdsf
DN: cn=fdsf, o=fsdfsd, DESKTOP ATHLON64 DDR200,266,333,400 UNBUFFERED DDR
DIMM1,3
128bit
939-Pin uFCPGA 939 7
ou=ffsdf,
D
MS-7050-130 email=fdfsd@fsdff, c=US DDR200,266,333,400
184-PIN DDR FIRST LOGICAL DIMM
UNBUFFERED DDR D
Date: 2009.10.09 5,6,9
DIMM2,4
8
07:26:39 +07'00' HyperTransport LINK0
184-PIN DDR SECOND LOGICAL DIMM
LINK0
16x16
ATI NB
External Clock Generator
DESKTOP RS480
HyperTransport LINK0 CPU I/F
ICS951412 16 INTEGRATED GRAPHICS
2X PCI Express Link
VGA CON CRT
17
1 PCI-E SLOTS PCIE 16X
23 PCIE 16X 10,11,12,13,14,15
23
C C
RJ45 Gbit/10/100 1X PCI-E Link OR PCI BUS 1X PCI-E Link 2X PCIE
32 ETHERNET 32
ATI SB
USB-7 USB-6 USB-5 USB-4 USB-3 USB-2 USB-1 USB-0 USB 2.0
DESKTOP SB400 AC LINK AC97 CODEC AC97 JACK
28 28 27 27 27 27 27 27
USB2.0 (4+4) 31 31
SATA
AC97 2.2
SATA Port #1~#2
ATA 66/100 SATA Link
20
ACPI 1.1
PCI BUS
LPC I/F
INT RTC
ATA 66/100 IDE1
PCI/PCI BDGE
29
B
PCI SLOT 1 PCI SLOT 0 18,19,20,21,22 B
25 25
LPC I/F
DESKTOP ATHLON64
Board Stack-up POWER
33
FLASH
1/2 oz. Cu plus SMSC LPC SIO 47M397 TCPA BIOS
plating 24 36 26
Solder
RS480 CORE & PCIE
Mask POWER
34,35
PREPREG 4.5mils
1 oz. Cu Power
Plane
ACPI CONTROLLER & EMCT03 KBD SERIAL FAN
DDR MEMORY HARDWARE FLOPPY LPT
MOUSE PORTS CONTROL
34
POWER MONITOR 24 30 24 30 36
CORE 47mils 24
A A
1 oz. Cu Ground
Plane Micro Star Restricted Secret
PREPREG 4.5mils Title Rev
01.BLOCK DIAGRAM 130
Solder Document Number MS-7050
Mask
1/2 oz. Cu plus MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, April 19, 2005
plating Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 1 of 41
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TABLE OF CONTENTS
D D
P01: BLOCK DIAGRAM P24: SIO-47M397 & KB/MS
SMBUS ADDRESS
P02: TABLE OF CONTENTS P25: PCI SLOTS 1 & 2
CLOCK GEN. : D2
P03: POWER DELIVERY CHART P26: BIOS ROM
SIO : 5A
P04: CLOCK DISTRIBUTION P27: REAR USB 2.0 PORTS 0,1,2,3,4,5
MS6 : 5E
P05: ATHLON64 HT I/F CTRL & DEBUG P28: FRONT USB 2.0 PORTS 6,7
DIMM : A0,A2
P06: ATHLON64 DDR MEMORY I/F P29: ATA 66/100 EIDE & CD ROM
DVI : 70 (READ)
P07: FIRST LOGICAL DDR DIMM P30: COM PORT & LPT
DVI : 71 (WRITE)
P08: SECOND LOGICAL DDR DIMM P31: AC97 2.3 CODEC
P09: ATHLON64 PWR & GND P32: GIGABIT ETHERNET
C
P10: RS480-HT LINK0 I/F P33: DESKTOP ATHLON64 PWR C
P11: RS480-SIDE PORT MEMORY I/F P34: MS6 ACPI CONTROLLER
P12: RS480-PCIE LINK I/F P35: POWER REGULATOR
P13: RS480-VIDEO I/F & CLKGEN P36: ATX CON. /FAN/FRONT PANEL
P14: RS480-POWER P37: BLEED OFF/LED/HOOD SENCE
P15: RS480-STRAPS P38: DVI CONNECTOR
P16: EXTERNAL CLOCK GENERATOR P39: CHANGE HISTORY
P17: VGA CON. P40: MANUAL PARTS
P18: SB400- PCI-E/PCI/CPU/LPC
P19: SB400 - APCI/GPIO/AC97/USB
B
P20: SB400 - SATA/IDE B
P21: SB400 - PWR & DECOUPLING
P22: SB400 - STRAPS
P23: PCIE CONNECTOR
A A
Micro Star Restricted Secret
Title Rev
02.TABLE OF CONTENTS 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, April 19, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 2 of 41
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ATHLON 64
CPU
ATX P/S WITH 1A STBY CURRENT PW VRM SW CPU_VCORE (S0, S1) VDDCORE
VBAT 5VSB REGULATOR 0.8-1.55V 60A
5V 3.3V 12V -12V 12V VTT_DDR_SUS (S0,S1,S3)
+/-5% +/-5% +/-5% +/-5% +/-5% DDR400 MEM I/F
+/-5% VCC_DDR(S0,S1,S3) VTT 2A, VDD 2A
VDD 1.2V SW VDDA_1V2 (S0, S1)
VLDT 1.2V 0.5A
REGULATOR NB RS480M
VDDHT
VDDHT 1.2V 0.5A
D D
PCIE_VDD12 PCI-E CORE
&VCO 2.25A
VCC_NB (S0, S1)
NB CORE VDDC
1.0-1.2V 5A
VCC 2.5V AVDD(S0, S1)
LVDS 2.5V 300mA
REGULATOR DAC 200mA
LVDDR18
PLL & DAC-Q 0.1A
1.8V +1.8V_S0 (S0, S1) PCIE_VDD18
1.8V_S3 +1.8V_S3 PCI-E I/O 750mA
REGULATOR VDD18
REGULATOR LVDS 1.8V 100mA
1.25V VTT_DDR VDDQ 1.8V SIDE PORT MEM I/F 2A
REGULATOR DDR400 DIMMs REGULATOR +1.8VDUAL_SPMEM(S0,S1,S3)
VTT_DDR_SUS (S0,S1,S3)
2.5V VDDR
REGULATOR VTT_DDR 2A
VCC_DDR(S0,S1,S3) SB SB400
VDD MEM 12A
X4 PCI-E 0.8A
+3.3VSB (S0, S1, S3, S4, S5)
+3V_Dual (S0, S1, S3) ATA I/O 0.2A
+3.3VSB REGULATOR
ACPI CONTROLLER ATA PLL 0.01A
PCI-E PVDD 80mA
C C
+5VSB REGULATOR +5V_Dual (S0, S1, S3) SB CORE 0.6A
ACPI CONTROLLER 1.8V S5 PW 0.22A
1.8V STB LDO +1.8VSB (S0, S1, S3, S4, S5) 3.3V S5 PW 0.01A
REGULATOR
USB CORE I/O 0.2A
3.3V I/O 0.45A
+1.8V_S3 (S0,S1,S3)
+3.3V (S0, S1) 1.8V USB
RTCVCC
AC97 CODEC
5VAA LDO 3.3V CORE 0.3A
+5VR (S0, S1)
REGULATOR 5V ANALOG 0.1A
ENTHERNET
3.3V 0.5A (S0, S1)
B
3.3V 0.1A (S0,S1,S3) B
SUPER I/O
+3V SD 0.01A
+3V 0.1A
VBAT
PCI Slot (per slot) X1 PCIE per X16 PCIE USB X2 FR USB X6 RL 2XPS/2
5V 5.0A 3.3V 3.0A 3.3V 3.0A VDD VDD 5VDual
3.3V 7.6A 5VDual 5VDual
12V 0.5A 12V 5.5A 1.0A
A
12V 0.5A 1.0A 3.0A A
3.3Vaux 0.1A
3.3Vaux 0.375A
-12V 0.1A
Micro Star Restricted Secret
Title Rev
03.POWER DELIVERY CHART 130
+3.3VDUAL (S0, S1, S3)
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, April 19, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 3 of 41
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D D
PCI CLKFB
PCI CLK
DIMM1,3 DIMM2,4
33MHZ
PCI CLK0
PCI SLOT0
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
33MHZ
PCI CLK1
PCI SLOT1
33MHZ
1PAIR NB CLK
66MHZ
C ATI RS480 SB-OSC ATI SB C
ATHLON 64 FX 1 PAIR CPU CLK NB-OSC 14.318MHZ
200MHZ 14.318MHZ
LGA939 PACKAGE 14.318MHZ OSC INPUT SB400
(OPTION) PCI CLK3 ETHERNET 25MHZ OSC INPUT
TVCLKIN
33MHZ PCI Gbit/100/10
NB PCIE CLK
100MHZ
SB PCIE CLK
100MHZ RTC_CLK
32.768KHZ
EXTERNAL PCIE CLK PCI CLK6 KB_CLK
14.318MHZ OSC INPUT SUPER IO KEYBOARD
CLK GEN. 100MHZ PCIE GFX SLOT - 16 LANES 33MHZ
47M397
SIO_CLK MS_CLK
PCIE CLK 14.318MHZ MOUSE
100MHZ PCIE GPP SLOT 0 - 1 LANE
PCIE CLK AC97_BITCLK 14.318MHZ
AC97 CODEC
100MHZ PCIE Gbit Ethernet
B B
14.318MHZ OUTPUT PCIE CLK
100MHZ 32.768KHZ OSC INPUT
14.318MHZ OUTPUT USB CLK
48MHZ 25MHZ OSC INPUT FOR SATA
48MHZ OSC INPUT FOR USB
(OPTION) RTC_CLK
TCPA CONN.
32.768KHZ
A A
Micro Star Restricted Secret
Title Rev
04.CLOCK DISTRIBUTION 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, April 19, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 4 of 41
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RN2 VCC_DDR
8P4R-680 VDDA_25 VDDA_25 VDDA25 RN1
HT_CADIN_H[15..0] 1 2 80S/0805 8 7 LDT_RST_G
(10) HT_CADIN_H[15..0]
CPU_STRAP_HI_AF12 3 4 2 1 L41 6 5 LDT_PG
HT_CADIN_L[15..0] CPU_STRAP_HI_AJ12 5 6 4 3 LDTSTOP#
(10) HT_CADIN_L[15..0]
VCCA_1V2 VCC1_2HT CPU_STRAP_LO_AH10 7 8 2 1 CPU_THRIP#
HT_CADOUT_H[15..0] 80S/0805 CPU_STRAP_LO_AJ10 1 2
(10) HT_CADOUT_H[15..0]
2 1 L1 CPU_STRAP_LO_AF10 3 4 X_8P4R-680
HT_CADOUT_L[15..0] CPU_STRAP_LO_AH6 5 6
(10) HT_CADOUT_L[15..0]
CPU_STRAP_LO_AG9 7 8
D
VDDA25 D
RN3
8P4R-680
C1 C2 C3
475P/1206 224P 103P CPU1D
C3 AG10 CPU_THRIP#
VDDA3 THERMTRIP_L
B3 VDDA2
VCC1_2HT VCC1_2HT A3 AJ2 SM_THERMDA
VDDA1 THERMDA SM_THERMDA (24)
CPU1A AJ1 SM_THERMDC
THERMDC SM_THERMDC (24)
E2 AG4 LDT_RST_G F8 VID[0..4] (33)
VLDT_06 VLDT_08 VCC1_2HT C641 LDT_PG RESET_L VID4
E1 VLDT_05 VLDT_07 AG3 E8 PWROK VID4 A13
C4 C5 C6 C7 F1 AG1 C8 C9 C10 C11 C12 LDTSTOP# B6 A12 VID3
224P 224P 224P 224P VLDT_02 VLDT_04 475P/1206 224P 224P 224P 224P X_102P LDTSTOP_L VID3 VID2
F2 VLDT_01 VLDT_03 AG2 VID2 C12
R1 44.2RST CPU_L0_REF1 D1 A11 VID1
R2 44.2RST CPU_L0_REF0 L0_REF1 VID1 VID0
C1 L0_REF0 VID0 A10
HT_CADIN_H15 R5 V4 HT_CADOUT_H15
HT_CADIN_L15 L0_CADIN_H15 L0_CADOUT_H15 HT_CADOUT_L15 COREFB+ E5 CPU_NC_C13
T5 L0_CADIN_L15 L0_CADOUT_L15 V3 (33) COREFB+ COREFB_H BP3 C13 TP1
HT_CADIN_H14 P3 Y5 HT_CADOUT_H14 C13 C14 COREFB- E6 E9 CPU_NC_E9
L0_CADIN_H14 L0_CADOUT_H14 (33) COREFB- COREFB_L BP2 TP2
HT_CADIN_L14 P4 W5 HT_CADOUT_L14 C15 E7 B13 CPU_STRAP_LO_B13 R3 680
L0_CADIN_L14 L0_CADOUT_L14 VCC_DDR TP3 CORESENSE BP1
HT_CADIN_H13 N5 Y4 HT_CADOUT_H13 102P 102P CPU_CORESENSE C10 CPU_STRAP_LO_C10 R4 680
L0_CADIN_H13 L0_CADOUT_H13 (16) CPU_CLK TP4 BP0
HT_CADIN_L13 P5 Y3 HT_CADOUT_L13 CPU_VDDIOFB_H Y24
L0_CADIN_L13 L0_CADOUT_L13 TP5 VDDIOFB_H
HT_CADIN_H12 M3 AB5 HT_CADOUT_H12 392p CPU_VDDIOFB_L AA24
L0_CADIN_H12 L0_CADOUT_H12 TP6 VDDIOFB_L
HT_CADIN_L12 M4 AA5 HT_CADOUT_L12 15:5:5:15 R5 AE13
HT_CADIN_H11 L0_CADIN_L12 L0_CADOUT_L12 HT_CADOUT_H11 169RST (34) VCC_DDR_SENSE VDDIOSENSE
K3 L0_CADIN_H11 L0_CADOUT_H11 AD5
HT_CADIN_L11 K4 AC5 HT_CADOUT_L11 R6 C16 CPUCLKIN A8 F13 CPU_FBCLKOUT_H
HT_CADIN_H10 L0_CADIN_L11 L0_CADOUT_L11 HT_CADOUT_H10 820RST CPUCLKIN# CLKIN_H FBCLKOUT_H
15:5:5:15 J5 L0_CADIN_H10 L0_CADOUT_H10 AD4 (16) CPU_CLK# B8 CLKIN_L FBCLKOUT_L E13
HT_CADIN_L10 K5 AD3 HT_CADOUT_L10
HT_CADIN_H9 L0_CADIN_L10 L0_CADOUT_L10 HT_CADOUT_H9 392p CPU_STRAP_HI_E11 R7
H3 L0_CADIN_H9 L0_CADOUT_H9 AF5 E11 BYPASSCLK_H
HT_CADIN_L9 H4 AE5 HT_CADOUT_L9 CPU_STRAP_LO_F11 F11 80.6RST
C HT_CADIN_H8 L0_CADIN_L9 L0_CADOUT_L9 HT_CADOUT_H8 BYPASSCLK_L C
G5 L0_CADIN_H8 L0_CADOUT_H8 AF4
HT_CADIN_L8 H5 AF3 HT_CADOUT_L8 CPU_NC_C5 C5 CPU_FBCLKOUT_L
L0_CADIN_L8 L0_CADOUT_L8 TP7 PLLCHRZ_H
HT_CADIN_H7 R3 V1 HT_CADOUT_H7 R8 CPU_NC_A5 A5
L0_CADIN_H7 L0_CADOUT_H7 TP8 PLLCHRZ_L
HT_CADIN_L7 R2 U1 HT_CADOUT_L7 820RST
HT_CADIN_H6 L0_CADIN_L7 L0_CADOUT_L7 HT_CADOUT_H6 CPU_DBRDY CPU_DBREQ_L
N1 L0_CADIN_H6 L0_CADOUT_H6 W2 B11 DBRDY DBREQ_L A6
HT_CADIN_L6 P1 W3 HT_CADOUT_L6
HT_CADIN_H5 L0_CADIN_L6 L0_CADOUT_L6 HT_CADOUT_H5 CPU_TMS CPU_STRAP_LO_AG9
N3 L0_CADIN_H5 L0_CADOUT_H5 Y1 AG6 TMS SCANCLK2 AG9
HT_CADIN_L5 N2 W1 HT_CADOUT_L5 CPU_TCK AG7 AH6 CPU_STRAP_LO_AH6
HT_CADIN_H4 L0_CADIN_L5 L0_CADOUT_L5 HT_CADOUT_H4 CPU_TRST_L AF8 TCK SCANCLK1 CPU_STRAP_LO_AF10
L1 L0_CADIN_H4 L0_CADOUT_H4 AA2 TRST_L SCANEN AF10
HT_CADIN_L4 M1 AA3 HT_CADOUT_L4 CPU_TDI AJ9 AH10 CPU_STRAP_LO_AH10
HT_CADIN_H3 L0_CADIN_L4 L0_CADOUT_L4 HT_CADOUT_H3 TDI SCANSHIFTENB CPU_STRAP_LO_AJ10
J1 L0_CADIN_H3 L0_CADOUT_H3 AC2 SCANSHIFTEN AJ10
HT_CADIN_L3 K1 AC3 HT_CADOUT_L3 CPU_STRAP_HI_AJ12 AJ12
HT_CADIN_H2 L0_CADIN_L3 L0_CADOUT_L3 HT_CADOUT_H2 VCC1_2HT CPU_STRAP_HI_AF12 SINGLECHAIN CPU_TDO
J3 L0_CADIN_H2 L0_CADOUT_H2 AD1 AF12 BURNIN_L TDO AG8
HT_CADIN_L2 J2 AC1 HT_CADOUT_L2
HT_CADIN_H1 L0_CADIN_L2 L0_CADOUT_L2 HT_CADOUT_H1 R9 49.9RST CPU_STRAP_HI_T3 CPU_NC_V5
G1 L0_CADIN_H1 L0_CADOUT_H1 AE2 T3 SCANIN_H SCANOUT_H V5 TP9
HT_CADIN_L1 H1 AE3 HT_CADOUT_L1 R10 49.9RST CPU_STRAP_LO_T4 T4 U5 CPU_NC_U5
L0_CADIN_L1 L0_CADOUT_L1 SCANIN_L SCANOUT_L TP10
HT_CADIN_H0 G3 AF1 HT_CADOUT_H0
HT_CADIN_L0 L0_CADIN_H0 L0_CADOUT_H0 HT_CADOUT_L0 CPU_NC_A4
G2 L0_CADIN_L0 L0_CADOUT_L0 AE1 TP11 A4 ANALOG3
CPU_NC_D4 D4
TP12 ANALOG2
L5 AB4 CPU_NC_B4 B4
(10) HT_CLKIN_H1 L0_CLKIN_H1 L0_CLKOUT_H1 HT_CLKOUT_H1 (10) TP13 ANALOG1
M5 AB3 CPU_NC_C4 C4
(10) HT_CLKIN_L1 L0_CLKIN_L1 L0_CLKOUT_L1 HT_CLKOUT_L1 (10) TP14 ANALOG0
L3 AB1 CPU_NC_C7 C7
(10) HT_CLKIN_H0 L0_CLKIN_H0 L0_CLKOUT_H0 HT_CLKOUT_H0 (10) TP15 DIG_T VTT_DDR
20:5:5:20 L2 AA1 20:5:5:20 CPU_NC_C6 C6
(10) HT_CLKIN_L0 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CLKOUT_L0 (10) TP16 ANALOG_T VTT_DDR
(10) HT_CTLIN_H0 R1 L0_CTLIN_H0 L0_CTLOUT_H0 U2 HT_CTLOUT_H0 (10) AL8 RSVD_SMBUSC PROGEN1_L AL14
(10) HT_CTLIN_L0 T1 L0_CTLIN_L0 L0_CTLOUT_L0 U3 HT_CTLOUT_L0 (10) AL7 RSVD_SMBUSD PROGEN0_L A14
VLDT 0 AE22 FREE1
AG22 FREE2 FREE22 AL9
AH8 FREE3 FREE23 AL10
B B
AH29 FREE4 FREE24 AL11
AJ4 MISC AL12
FREE5 FREE25
AJ5 FREE6 FREE26 C22
AJ6 FREE7 FREE27 C28
VCC2_5 AJ7 D8
FREE8 FREE28
SW1 AJ8 FREE9 FREE29 D11
AJ22 FREE10 FREE30 D12
1 3 R11 X_100 LDT_RST_G AJ28 D29
FREE11 FREE31
5
2 4 AK3 FREE12 FREE32 E21
1 AK4 FREE13 FREE33 E22
4 LDT_RST_G AK6 G15
X_TACTSW LDT_RST# FREE14 FREE34
2 AK8 FREE15 FREE35 N27
U53 AK10 T25
X_NC7SZ126M5 FREE16 FREE36
AK12 T29
3
FREE17 FREE37
FOR AMD DEBUG(PROTO) AL3 FREE18 FREE38 U28
AL4 FREE19 FREE39 C11
AL5 FREE20 FREE40 AG15
AL6 FREE21 FREE41 AH12
R656 0
VCC_DDR VDDA_25
HDT Connector VCC2_5 RN115
2
4
6
8
2
4
6
8
RN4 RN5 VDDA_25 J1 8P4R-680
1 2 8 7 LDTSTOP#
LDT_RST_G
8P4R-680 3 4 6 5 LDT_PG
8P4R-680 5 6 (18) LDT_PG LDT_PG 4 3 LDT_RST#
1
3
5
7
1
3
5
7
CPU_DBREQ_L 7 8 VCC_DDR 2 1
CPU_DBRDY 9 10
CPU_TCK 11 12 (18,37) LDT_RST# LDT_RST#
A
CPU_TMS 13 14 R650 A
CPU_TDI 15 16 R12 X_0
THERMTRIP# (19,34)
CPU_TRST_L 17 18 LDTSTOP# R630 1K
(13,18) LDTSTOP#
CPU_TDO 19 20 680
21 22
Q1 2N3904S
23 24 Micro Star Restricted Secret
KEY
26
CPU_THRIP#
H_THERMTRIP# (24) Title Rev
05.ATHLON64 HT I/F CTRL & DEBUG 130
Document Number MS-7050
R13 X_0
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 5 of 41
5 4 3 2 1
www.kythuatvitinh.com
5 4 3 2 1
VDD_VTT_SUS_CPU is connected to the VDD_VTT_SUS power
supply through the package or on the die. It is only connected
on the board to decoupling near the CPU package.
CPU1C VTT_DDR
MDQ_B63 AJ15 AE16 MDQ_A63 CPU1B
(8) MDQ_B[0..63] MEMDATA127 MEMDATA63 MDQ_A[0..63] (7)
MDQ_B62 AL16 AG17 MDQ_A62 B14
MDQ_B61 MEMDATA126 MEMDATA62 MDQ_A61 VTT6
AL18 MEMDATA125 MEMDATA61 AG18 C14 VTT7 MEMCLK_1H_H2 AL22 MCLK_1H2 (8)
MDQ_B60 AL19 AE18 MDQ_A60 D14 AL23
MEMDATA124 MEMDATA60 VTT_DDR VTT8 MEMCLK_1H_L2 MCLK_1H#2 (8)
D MDQ_B59 AL15 AJ16 MDQ_A59 E14 A22 D
MEMDATA123 MEMDATA59 VTT1 MEMCLK_1H_H1 MCLK_1H1 (8)
MDQ_B58 AK15 AG16 MDQ_A58 A23 DIMM2
MEMDATA122 MEMDATA58 MEMCLK_1H_L1 MCLK_1H#1 (8)
MDQ_B57 AK17 AE17 MDQ_A57 AG14 R31
MEMDATA121 MEMDATA57 VCC_DDR VTT5 MEMCLK_1H_H0 MCLK_1H0 (8)
MDQ_B56 AJ17 AJ18 MDQ_A56 AK14 R30
MEMDATA120 MEMDATA56 VDDR_VREF VTT4 MEMCLK_1H_L0 MCLK_1H#0 (8)
MDQ_B55 AH19 AJ20 MDQ_A55 AJ14 AH23
MEMDATA119 MEMDATA55 VTT3 MEMCLK_1L_H2 MCLK_1L2 (7)
MDQ_B54 AL21 AE20 MDQ_A54 C17 C18 AH14 AG23
MEMDATA118 MEMDATA54 VTT2 MEMCLK_1L_L2 MCLK_1L#2 (7)
MDQ_B53 AJ23 AE23 MDQ_A53 475P/0805 224P D23
MEMDATA117 MEMDATA53 MEMCLK_1L_H1 MCLK_1L1 (7)
MDQ_B52 AL25 AG24 MDQ_A52 R14 F15 E23 DIMM1
MEMDATA116 MEMDATA52 MEMVREF MEMCLK_1L_L1 MCLK_1L#1 (7)
MDQ_B51 AK19 AG19 MDQ_A51 34.8RST/B R27
MEMDATA115 MEMDATA51 MEMCLK_1L_H0 MCLK_1L0 (7)
MDQ_B50 AJ19 AE19 MDQ_A50 CPU_VTT_SENSE AF13 R26
MEMDATA114 MEMDATA50 (34) CPU_VTT_SENSE VTT_SENSE MEMCLK_1L_L0 MCLK_1L#0 (7)
MDQ_B49 AL24 AJ24 MDQ_A49
MDQ_B48 MEMDATA113 MEMDATA49 MDQ_A48 MEM_ZN
AK25 MEMDATA112 MEMDATA48 AE24 AF15 MEMZN MEMCLK_2H_H2 AJ21 MCLK_2H2 (8)
MDQ_B47 AJ25 AG25 MDQ_A47 MEM_ZP AE15 AH21
MEMDATA111 MEMDATA47 MEMZP MEMCLK_2H_L2 MCLK_2H#2 (8)
MDQ_B46 AL26 AE25 MDQ_A46 C21
MEMDATA110 MEMDATA46 MEMCLK_2H_H1 MCLK_2H1 (8)
MDQ_B45 AG29 AD25 MDQ_A45 MCS_1H#1 AL29 D21 DIMM4
MEMDATA109 MEMDATA45 (8) MCS_1H#1 MEMCS_1H_L1 MEMCLK_2H_L1 MCLK_2H#1 (8)
MDQ_B44 AF31 AC25 MDQ_A44 R15 MCS_1H#0 AJ29 T31
MEMDATA108 MEMDATA44 (8) MCS_1H#0 MEMCS_1H_L0 MEMCLK_2H_H0 MCLK_2H0 (8)
MDQ_B43 AH25 AF25 MDQ_A43 34.8RST/B MCS_1L#1 AG28 U31
MEMDATA107 MEMDATA43 (7) MCS_1L#1 MEMCS_1L_L1 MEMCLK_2H_L0 MCLK_2H#0 (8)
MDQ_B42 AL27 AJ26 MDQ_A42 MCS_1L#0 AF29 AF21
MEMDATA106 MEMDATA42 (7) MCS_1L#0 MEMCS_1L_L0 MEMCLK_2L_H2 MCLK_2L2 (7)
MDQ_B41 AJ31 AE27 MDQ_A41 AE21
MEMDATA105 MEMDATA41 MEMCLK_2L_L2 MCLK_2L#2 (7)
MDQ_B40 AG31 AD29 MDQ_A40 MCS_2H#1 AL28 G21
MEMDATA104 MEMDATA40 (8) MCS_2H#1 MEMCS_2H_L1 MEMCLK_2L_H1 MCLK_2L1 (7)
MDQ_B39 AE31 AB25 MDQ_A39 MCS_2H#0 AJ30 G22 DIMM3
MEMDATA103 MEMDATA39 (8) MCS_2H#0 MEMCS_2H_L0 MEMCLK_2L_L1 MCLK_2L#1 (7)
MDQ_B38 AD31 AB27 MDQ_A38 MCS_2L#1 AG27 T27
MEMDATA102 MEMDATA38 (7) MCS_2L#1 MEMCS_2L_L1 MEMCLK_2L_H0 MCLK_2L0 (7)
MDQ_B37 AB31 AA28 MDQ_A37 MCS_2L#0 AE26 U27
MEMDATA101 MEMDATA37 (7) MCS_2L#0 MEMCS_2L_L0 MEMCLK_2L_L0 MCLK_2L#0 (7)
MDQ_B36 AA29 Y25 MDQ_A36
MDQ_B35 MEMDATA100 MEMDATA36 MDQ_A35 MEM_CKED C25
AE29 MEMDATA99 MEMDATA35 AC26 (8) MEM_CKED MEMCKED
MDQ_B34 AC28 AB29 MDQ_A34 MEM_CKEC B25
MEMDATA98 MEMDATA34 (8) MEM_CKEC MEMCKEC
MDQ_B33 AC31 AA27 MDQ_A33 MEM_CKEB E25
MEMDATA97 MEMDATA33 (7) MEM_CKEB MEMCKEB
MDQ_B32 AA30 Y27 MDQ_A32 MEM_CKEA G24
MEMDATA96 MEMDATA32 (7) MEM_CKEA MEMCKEA
MDQ_B31 M31 N25 MDQ_A31
MDQ_B30 MEMDATA95 MEMDATA31 MDQ_A30 MA_A13 MA_B13
L30 MEMDATA94 MEMDATA30 M25 (7) MA_A[13..0] AF23 MEMADDA13 MEMADDB13 AK23 MA_B[13..0] (8)
MDQ_B29 H31 K27 MDQ_A29 MA_A12 C26 A26 MA_B12
C MDQ_B28 MEMDATA93 MEMDATA29 MDQ_A28 MA_A11 MEMADDA12 MEMADDB12 MA_B11 C
G31 MEMDATA92 MEMDATA28 K25 E28 MEMADDA11 MEMADDB11 A29
MDQ_B27 L31 M29 MDQ_A27 MA_A10 V27 W30 MA_B10
MDQ_B26 MEMDATA91 MEMDATA27 MDQ_A26 MA_A9 MEMADDA10 MEMADDB10 MA_B9
L29 MEMDATA90 MEMDATA26 M27 F29 MEMADDA9 MEMADDB9 C29
MDQ_B25 J28 K29 MDQ_A25 MA_A8 H25 E29 MA_B8
MDQ_B24 MEMDATA89 MEMDATA25 MDQ_A24 MA_A7 MEMADDA8 MEMADDB8 MA_B7
G30 MEMDATA88 MEMDATA24 J27 G28 MEMADDA7 MEMADDB7 D31
MDQ_B23 E30 H27 MDQ_A23 MA_A6 J26 G29 MA_B6
MDQ_B22 MEMDATA87 MEMDATA23 MDQ_A22 MA_A5 MEMADDA6 MEMADDB6 MA_B5
C31 MEMDATA86 MEMDATA22 G27 J25 MEMADDA5 MEMADDB5 F31
MDQ_B21 C27 D27 MDQ_A21 DIMM1 MA_A4 L27 J31 MA_B4 DIMM2
MDQ_B20 MEMDATA85 MEMDATA21 MDQ_A20 MA_A3 MEMADDA4 MEMADDB4 MA_B3
D25 MEMDATA84 MEMDATA20 F25 L28 MEMADDA3 MEMADDB3 K31
MDQ_B19 E31 H29 MDQ_A19 DIMM3 MA_A2 N26 N28 MA_B2 DIMM4
MDQ_B18 MEMDATA83 MEMDATA19 MDQ_A18 MA_A1 MEMADDA2 MEMADDB2 MA_B1
C30 MEMDATA82 MEMDATA18 G26 P25 MEMADDA1 MEMADDB1 N30
MDQ_B17 B27 E26 MDQ_A17 MA_A0 U25 U29 MA_B0
MDQ_B16 MEMDATA81 MEMDATA17 MDQ_A16 MEMADDA0 MEMADDB0
A27 MEMDATA80 MEMDATA16 G25
MDQ_B15 C23 G23 MDQ_A15 MBA_A1 W25 Y31 MBA_B1
MEMDATA79 MEMDATA15 (7) MBA_A1 MEMBANKA1 MEMBANKB1 MBA_B1 (8)
MDQ_B14 B23 F23 MDQ_A14 MBA_A0 AC27 AE30 MBA_B0
MEMDATA78 MEMDATA14 (7) MBA_A0 MEMBANKA0 MEMBANKB0 MBA_B0 (8)
MDQ_B13 A20 C20 MDQ_A13
MDQ_B12 MEMDATA77 MEMDATA13 MDQ_A12 MRAS_A# AD27 MRAS_B#
B19 MEMDATA76 MEMDATA12 F19 (7) MRAS_A# MEMRASA_L MEMRASB_L AG30 MRAS_B# (8)
MDQ_B11 A25 E24 MDQ_A11 MCAS_A# AF27 AK29 MCAS_B#
MEMDATA75 MEMDATA11 (7) MCAS_A# MEMCASA_L MEMCASB_L MCAS_B# (8)
MDQ_B10 A24 C24 MDQ_A10 MWE_A# AE28 AH31 MWE_B#
MEMDATA74 MEMDATA10 (7) MWE_A# MEMWEA_L MEMWEB_L MWE_B# (8)
MDQ_B9 C19 G19 MDQ_A9
MDQ_B8 MEMDATA73DDR: DATA MEMDATA9 MDQ_A8
A19 MEMDATA72 MEMDATA8 E19 MEMRESET_L D19
MDQ_B7 D17 E18 MDQ_A7
MDQ_B6 MEMDATA71 MEMDATA7 MDQ_A6 DDR: CMD/CTRL/CLK
B17 MEMDATA70 MEMDATA6 G17
MDQ_B5 C15 E16 MDQ_A5 Athlon 64 939 Processor
MDQ_B4 MEMDATA69 MEMDATA5 MDQ_A4
A15 MEMDATA68 MEMDATA4 E15
MDQ_B3 A18 G18 MDQ_A3
MDQ_B2 MEMDATA67 MEMDATA3 MDQ_A2
C17 MEMDATA66 MEMDATA2 C18
MDQ_B1 D15 G16 MDQ_A1
MDQ_B0 MEMDATA65 MEMDATA1 MDQ_A0
B15 MEMDATA64 MEMDATA0 C16
B B
AA31 MEMCHECK15 MEMCHECK7 Y29
W29 MEMCHECK14 MEMCHECK6 W27
N31 P27 MA_A13 C19 22P/B MCS_2H#1 C576 22P
MEMCHECK13 MEMCHECK5 MA_A12 C20 22P/B MCS_2H#0 C577 22P
N29 MEMCHECK12 MEMCHECK4 R25
W28 W26 MA_A11 C21 22P/B MCS_2L#1 C578 22P/B
MEMCHECK11 MEMCHECK3 MA_A10 C22 22P/B MCS_2L#0 C579 22P/B
W31 MEMCHECK10 MEMCHECK2 V25
R29 R28 MA_A9 C23 22P/B
MEMCHECK9 MEMCHECK1 MA_A8 C25 22P/B
P31 MEMCHECK8 MEMCHECK0 P29
MA_A7 C27 22P/B MCS_1H#1 C24 22P
V31 V29 MA_A6 C29 22P/B MCS_1H#0 C26 22P
(8) MDQM_B[0..7] MEMDM_UP8 MEMDM_LO8 MDQM_A[0..7] (7)
MDQM_B7 AL17 AF17 MDQM_A7 MA_A5 C31 22P/B MCS_1L#1 C28 22P/B
MDQM_B6 MEMDM_UP7 MEMDM_LO7 MDQM_A6 MA_A4 C32 22P/B MCS_1L#0 C30 22P/B
AK21 MEMDM_UP6 MEMDM_LO6 AG21
MDQM_B5 AK27 AH27 MDQM_A5 MA_A3 C33 22P/B
MDQM_B4 MEMDM_UP5 MEMDM_LO5 MDQM_A4 MA_A2 C35 22P/B
AC29 MEMDM_UP4 MEMDM_LO4 AA25
MDQM_B3 J30 L26 MDQM_A3 MA_A1 C37 22P/B MBA_A1 C34 22P/B
MDQM_B2 MEMDM_UP3 MEMDM_LO3 MDQM_A2 MA_A0 C39 22P/B MBA_A0 C36 22P/B
B29 MEMDM_UP2 MEMDM_LO2 F27
MDQM_B1 B21 G20 MDQM_A1 MBA_B1 C38 22P
MDQM_B0 MEMDM_UP1 MEMDM_LO1 MDQM_A0 MA_B13 C41 22P MBA_B0 C40 22P
A16 MEMDM_UP0 MEMDM_LO0 E17
MA_B12 C42 22P
U30 U26 MA_B11 C44 22P MEM_CKED C580 22P
(8) MDQS_B[0..7] MEMDQS_UP8 MEMDQS_LO8 MDQS_A[0..7] (7)
MDQS_B7 AH15 AH17 MDQS_A7 MA_B10 C45 22P MEM_CKEC C43 22P
MDQS_B6 MEMDQS_UP7 MEMDQS_LO7 MDQS_A6 MA_B9 C47 22P MEM_CKEB C581 22P/B
AL20 MEMDQS_UP6 MEMDQS_LO6 AG20
MDQS_B5 AJ27 AG26 MDQS_A5 MA_B8 C48 22P MEM_CKEA C46 22P/B
MDQS_B4 MEMDQS_UP5 MEMDQS_LO5 MDQS_A4 MA_B7 C50 22P
AC30 MEMDQS_UP4 MEMDQS_LO4 AA26
MDQS_B3 J29 L25 MDQS_A3 MA_B6 C52 22P MRAS_A# C49 22P/B
MDQS_B2 MEMDQS_UP3 MEMDQS_LO3 MDQS_A2 MA_B5 C54 22P MCAS_A# C51 22P/B
A28 MEMDQS_UP2 MEMDQS_LO2 E27
MDQS_B1 A21 E20 MDQS_A1 MA_B4 C56 22P MWE_A# C53 22P/B
MDQS_B0 MEMDQS_UP1 MEMDQS_LO1 MDQS_A0 MA_B3 C58 22P MRAS_B# C55 22P
A17 MEMDQS_UP0 MEMDQS_LO0 F17
VCC_DDR MA_B2 C60 22P MCAS_B# C57 22P
Athlon 64 939 Processor MA_B1 C61 22P MWE_B# C59 22P
A
MA_B0 C62 22P A
R16
15RST/0805 C63 VDDR_VREF
X_103P Micro Star Restricted Secret
Title Rev
R17
C64 C65 C66
06.ATHLON64 DDR MEMORY I/F 130
15RST/0805 X_103P 102P 104P Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 6 of 41
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5 4 3 2 1
DDR Terminational Resisitors
DDR DIMM1
DDR DIMM3 VTT_DDR VTT_DDR
XMM1 XMM3 MDQ_A40 1 2 MDQ_A1 1 2
MA_A0 48 SIGNALS 2 MDQ_A0 MA_A0 48 SIGNALS 2 MDQ_A0 MDQ_A44 3 4 RN6 MDQ_A5 3 4 RN7
(6) MA_A[13..0] A0 DQ0 MDQ_A[0..63] (6) A0 DQ0
MA_A1 43 4 MDQ_A1 MA_A1 43 4 MDQ_A1 MDQ_A35 5 6 56/B MDQ_A0 5 6 56/B
MA_A2 A1 DQ1 MDQ_A2 MA_A2 A1 DQ1 MDQ_A2 MBA_A0 MDQ_A4
41 A2 DQ2 6 41 A2 DQ2 6 7 8 7 8
MA_A3 130 8 MDQ_A3 MA_A3 130 8 MDQ_A3 MDQ_A41 1 2 MDQ_A2 1 2
MA_A4 A3 DQ3 MDQ_A4 MA_A4 A3 DQ3 MDQ_A4 MWE_A# RN8 MDQ_A6 RN9
37 A4 DQ4 94 37 A4 DQ4 94 3 4 3 4
D MA_A5 32 95 MDQ_A5 MA_A5 32 95 MDQ_A5 MDQ_A45 5 6 56/B MDQS_A0 5 6 56/B D
MA_A6 A5 DQ5 MDQ_A6 MA_A6 A5 DQ5 MDQ_A6 MRAS_A# MDQM_A0
125 A6 DQ6 98 125 A6 DQ6 98 7 8 7 8
MA_A7 29 99 MDQ_A7 MA_A7 29 99 MDQ_A7 MDQ_A42 1 2 MDQ_A8 1 2
MA_A8 A7 DQ7 MDQ_A8 MA_A8 A7 DQ7 MDQ_A8 MDQS_A5 RN10 MDQ_A12 RN11
122 A8 DQ8 12 122 A8 DQ8 12 3 4 3 4
MA_A9 27 13 MDQ_A9 MA_A9 27 13 MDQ_A9 MDQM_A5 5 6 56/B MDQ_A3 5 6 56/B
MA_A10 A9 DQ9 MDQ_A10 MA_A10 A9 DQ9 MDQ_A10 MCS_2L#1 MDQ_A7
141 A10/AP DQ10 19 141 A10/AP DQ10 19 7 8 7 8
MA_A11 118 20 MDQ_A11 MA_A11 118 20 MDQ_A11 MDQ_A48 1 2 MDQM_A1 1 2
MA_A12 A11 DQ11 MDQ_A12 MA_A12 A11 DQ11 MDQ_A12 MDQ_A47 RN12 MDQS_A1 RN13
115 A12/NC DQ12 105 115 A12/NC DQ12 105 3 4 3 4
MA_A13 167 106 MDQ_A13 MA_A13 167 106 MDQ_A13 MDQ_A43 5 6 56/B MDQ_A9 5 6 56/B
A13/NC DQ13 MDQ_A14 A13/NC DQ13 MDQ_A14 MDQ_A46 MDQ_A13
DQ14 109 DQ14 109 7 8 7 8
MBA_A0 59 110 MDQ_A15 MBA_A0 59 110 MDQ_A15 MA_A13 1 2 MDQ_A11 1 2
(6) MBA_A0 BA0 DQ15 BA0 DQ15
MBA_A1 52 23 MDQ_A16 MBA_A1 52 23 MDQ_A16 MDQ_A53 3 4 RN14 MDQ_A10 3 4 RN15
(6) MBA_A1 BA1 DQ16 BA1 DQ16
113 24 MDQ_A17 113 24 MDQ_A17 MDQ_A49 5 6 56/B MDQ_A15 5 6 56/B
NC/BA2 DQ17 MDQ_A18 NC/BA2 DQ17 MDQ_A18 MDQ_A52 MDQ_A14
DQ18 28 DQ18 28 7 8 7 8
MCS_1L#0 157 31 MDQ_A19 MCS_2L#0 157 31 MDQ_A19 MDQ_A55 1 2 MDQS_A2 1 2
(6) MCS_1L#0 CS0# DQ19 (6) MCS_2L#0 CS0# DQ19
MCS_1L#1 158 114 MDQ_A20 MCS_2L#1 158 114 MDQ_A20 MDQ_A54 3 4 RN16 MDQ_A21 3 4 RN17
(6) MCS_1L#1 CS1# DQ20 (6) MCS_2L#1 CS1# DQ20
71 117 MDQ_A21 71 117 MDQ_A21 MDQS_A6 5 6 56/B MDQ_A17 5 6 56/B
NC/CS2# DQ21 MDQ_A22 NC/CS2# DQ21 MDQ_A22 MDQM_A6 MDQ_A16
163 NC/CS3# DQ22 121 163 NC/CS3# DQ22 121 7 8 7 8
123 MDQ_A23 123 MDQ_A23 MDQ_A61 1 2 MDQ_A18 1 2
MRAS_A# DQ23 MDQ_A24 MRAS_A# DQ23 MDQ_A24 MDQ_A60 RN18 MA_A9 RN19
(6) MRAS_A# 154 RAS# DQ24 33 154 RAS# DQ24 33 3 4 3 4
MCAS_A# 65 35 MDQ_A25 MCAS_A# 65 35 MDQ_A25 MDQ_A51 5 6 56/B MDQM_A2 5 6 56/B
(6) MCAS_A# CAS# DQ25 CAS# DQ25
MWE_A# 63 39 MDQ_A26 MWE_A# 63 39 MDQ_A26 MDQ_A50 7 8 MA_A11 7 8
(6) MWE_A# WE# DQ26 WE# DQ26
40 MDQ_A27 40 MDQ_A27 MDQ_A62 1 2 1 2
MDQS_A0 DQ27 MDQ_A28 MDQS_A0 DQ27 MDQ_A28 MDQM_A7 RN20 MA_A8 RN21
(6) MDQS_A[0..7] 5 DQS0 DQ28 126 5 DQS0 DQ28 126 3 4 3 4
MDQS_A1 14 127 MDQ_A29 MDQS_A1 14 127 MDQ_A29 MDQ_A57 5 6 56/B MA_A7 5 6 56/B
MDQS_A2 DQS1 DQ29 MDQ_A30 MDQS_A2 DQS1 DQ29 MDQ_A30 MDQ_A56 MDQ_A22
25 DQS2 DQ30 131 25 DQS2 DQ30 131 7 8 7 8
MDQS_A3 36 133 MDQ_A31 MDQS_A3 36 133 MDQ_A31 MDQ_A59 1 2 MA_A6 1 2
MDQS_A4 DQS3 DQ31 MDQ_A32 MDQS_A4 DQS3 DQ31 MDQ_A32 MDQ_A58 RN22 MA_A5 RN23
56 DQS4 DQ32 53 56 DQS4 DQ32 53 3 4 3 4
MDQS_A5 67 55 MDQ_A33 MDQS_A5 67 55 MDQ_A33 MDQ_A63 5 6 56/B MDQ_A19 5 6 56/B
MDQS_A6 DQS5 DQ33 MDQ_A34 MDQS_A6 DQS5 DQ33 MDQ_A34 MDQS_A7 MDQ_A23
78 DQS6 DQ34 57 78 DQS6 DQ34 57 7 8 7 8
MDQS_A7 86 60 MDQ_A35 MDQS_A7 86 60 MDQ_A35 1 2 MA_A12 1 2
C DQS7 DQ35 MDQ_A36 DQS7 DQ35 MDQ_A36 MA_A1 RN28 MDQ_A20 RN25 C
47 DQS8 DQ36 146 47 DQS8 DQ36 146 3 4 3 4
147 MDQ_A37 147 MDQ_A37 5 6 56/B MEM_CKEB 5 6 56/B
MDQM_A0 DQ37 MDQ_A38 MDQM_A0 DQ37 MDQ_A38 MA_A2 MEM_CKEA
(6) MDQM_A[0..7] 97 DQM0/DQS9 DQ38 150 97 DQM0/DQS9 DQ38 150 7 8 7 8
MDQM_A1 107 151 MDQ_A39 MDQM_A1 107 151 MDQ_A39 MCS_1L#1 1 2 MDQ_A25 1 2
MDQM_A2 DQM1/DQS10 DQ39 MDQ_A40 MDQM_A2 DQM1/DQS10 DQ39 MDQ_A40 MCAS_A# RN30 MDQ_A29 RN27
119 DQM2/DQS11 DQ40 61 119 DQM2/DQS11 DQ40 61 3 4 3 4
MDQM_A3 129 64 MDQ_A41 MDQM_A3 129 64 MDQ_A41 MCS_1L#0 5 6 56/B MDQ_A28 5 6 56/B
MDQM_A4 DQM3/DQS12 DQ41 MDQ_A42 MDQM_A4 DQM3/DQS12 DQ41 MDQ_A42 MCS_2L#0 MDQ_A24
149 DQM4/DQS13 DQ42 68 149 DQM4/DQS13 DQ42 68 7 8 7 8
MDQM_A5 159 69 MDQ_A43 MDQM_A5 159 69 MDQ_A43 MDQ_A31 1 2
MDQM_A6 DQM5/DQS14 DQ43 MDQ_A44 MDQM_A6 DQM5/DQS14 DQ43 MDQ_A44 MDQ_A27 RN29
169 DQM6/DQS15 DQ44 153 169 DQM6/DQS15 DQ44 153 3 4
MDQM_A7 177 155 MDQ_A45 MDQM_A7 177 155 MDQ_A45 MDQ_A26 5 6 56/B
DQM7/DQS16 DQ45 MDQ_A46 DQM7/DQS16 DQ45 MDQ_A46 MDQ_A30
140 DQM8/DQS17 DQ46 161 140 DQM8/DQS17 DQ46 161 7 8
162 MDQ_A47 162 MDQ_A47 MDQ_A32 1 2
DQ47 MDQ_A48 DQ47 MDQ_A48 MBA_A1 RN31
44 MECC0 DQ48 72 44 MECC0 DQ48 72 3 4
45 73 MDQ_A49 45 73 MDQ_A49 MA_A10 5 6 56/B
MECC1 DQ49 MDQ_A50 MECC1 DQ49 MDQ_A50 MA_A0
49 MECC2 DQ50 79 49 MECC2 DQ50 79 7 8
51 80 MDQ_A51 51 80 MDQ_A51 MDQS_A4 1 2
MECC3 DQ51 MDQ_A52 MECC3 DQ51 MDQ_A52 MDQ_A33 RN32
134 MECC4 DQ52 165 134 MECC4 DQ52 165 3 4
135 166 MDQ_A53 135 166 MDQ_A53 MDQ_A37 5 6 56/B
MECC5 DQ53 MDQ_A54 MECC5 DQ53 MDQ_A54 R18 120 MDQ_A36
142 MECC6 DQ54 170 142 MECC6 DQ54 170 (6) MCLK_1L2 MCLK_1L#2 (6) 7 8
144 171 MDQ_A55 144 171 MDQ_A55 R19 120/B MDQ_A39 1 2
MECC7 DQ55 MECC7 DQ55 (6) MCLK_1L1 MCLK_1L#1 (6)
83 MDQ_A56 83 MDQ_A56 R20 120/B MDQ_A38 3 4 RN33
DQ56 DQ56 (6) MCLK_1L0 MCLK_1L#0 (6)
MEM_CKEA 21 84 MDQ_A57 21 84 MDQ_A57 MDQ_A34 5 6 56/B
(6) MEM_CKEA CKE0 DQ57 (6) MEM_CKEB CKE0 DQ57
111 87 MDQ_A58 111 87 MDQ_A58 MDQM_A4 7 8
CKE1 DQ58 MDQ_A59 CKE1 DQ58 MDQ_A59 R570 120 MA_A3
DQ59 88 DQ59 88 (6) MCLK_2L2 MCLK_2L#2 (6) 1 2
SMB_CLK 92 174 MDQ_A60 SMB_CLK 92 174 MDQ_A60 R571 120/B MA_A4 3 4 RN34
(8,16,19,23,25,32,34) SMB_CLK SCL DQ60 SCL DQ60 (6) MCLK_2L1 MCLK_2L#1 (6)
SMB_DATA 91 175 MDQ_A61 SMB_DATA 91 175 MDQ_A61 R572 120/B MDQM_A3 5 6 56/B
(8,16,19,23,25,32,34) SMB_DATA SDA DQ61 SDA DQ61 (6) MCLK_2L0 MCLK_2L#0 (6)
178 MDQ_A62 178 MDQ_A62 MDQS_A3 7 8
DQ62 MDQ_A63 DQ62 MDQ_A63
181 SA0 DQ63 179 181 SA0 DQ63 179
182 182
183
SA1
9 VCC_DDR VCC_DDR
183
SA1
9
DECOUPLING CAPACITORS
SA2 NC DDR_VREF1 SA2 NC
NC 101 NC 101
B B
NC 102 NC 102
16 173 R21 16 173 DDR_VREF1 VTT_DDR VCC_DDR
(6) MCLK_1L1 CK0/NC NC (6) MCLK_2L1 CK0/NC NC
17 75RST 17
(6) MCLK_1L#1 CK0#/NC (6) MCLK_2L#1 CK0#/NC VCC_DDR
137 1 137 1 DDR_VREF1 CB1 CB2
(6) MCLK_1L0 CK1/CK0 VREF (6) MCLK_2L0 CK1/CK0 VREF VTT_DDR
(6) MCLK_1L#0 138 CK1#/CK0# WP 90 R22 X_10K VCC_DDR (6) MCLK_2L#0 138 CK1#/CK0# WP 90 R573 X_10K 104P 104P
76 103 C67 R23 76 103 C582 CB3 CB4
(6) MCLK_1L2 CK2/NC FETEN/NC (6) MCLK_2L2 CK2/NC FETEN/NC
75 10 104P 75RST 75 10 VCC_DDR 102P CB29 CB5 104P 104P
(6) MCLK_1L#2 CK2#/NC NC/RESET# (6) MCLK_2L#2 CK2#/NC NC/RESET# X_104P/B 104P CB6 CB7
82 POWER 15 82 POWER 15 CB8 104P 104P
ID_VDD VDDQ VCC_DDR ID_VDD VDDQ VCC_DDR
22 22 CB35 104P CB9 CB10
VDDQ VDDQ X_104P CB11 106P/0805 104P
VCC_DDR 184 SPD_VDD VDDQ 30 VCC_DDR 184 SPD_VDD VDDQ 30
54 54 104P CB12 CB13
VDDQ VDDQ CB44 CB14 104P 104P VCC_DDR
VDDQ 62 VDDQ 62
7 77 7 77 X_104P 104P CB15 CB16
VCC_DDR VDD VDDQ VCC_DDR VDD VDDQ
38 96 38 96 CB110 104P 104P
VDD VDDQ VDD VDDQ CB49 102P/0805 CB17 CB18 CB19
46 VDD VDDQ 104 46 VDD VDDQ 104
70 112 70 112 X_104P/B CB111 104P 104P 104P
VDD VDDQ VDD VDDQ 102P/0805 CB20 CB21 CB22
85 VDD VDDQ 128 85 VDD VDDQ 128
108 136 108 136 CB112 104P 104P 104P
VDD VDDQ VDD VDDQ 106P/0805 CB24 CB25 CB26
120 VDD VDDQ 143 120 VDD VDDQ 143
148 156 148 156 104P 104P 104P
VDD VDDQ VDD VDDQ CB30 CB31 CB32
168 VDD VDDQ 164 168 VDD VDDQ 164
172 172 VCC_DDR 104P 104P 104P
VDDQ VDDQ VCC_DDR CB36 CB37 CB38
81 GND VDDQ 180 81 GND VDDQ 180
89 89 CB23 106P/0805 X_105P/0805 104P
GND GND X_104P CB40 CB41
93 GND GND 3 93 GND GND 3
100 11 100 11 CB28 CB27 104P 104P
GND GND GND GND X_104P X_104P/B CB45 CB46 VTT_DDR
116 GND GND 18 116 GND GND 18
124 26 124 26 CB33 104P 104P
GND GND GND GND CB34 X_104P
132 GND GND 34 132 GND GND 34
A 139 42 139 42 X_104P CB39 VTT_DDR A
GND GND GND GND 104P
145 GND GND 50 145 GND GND 50
152 58 152 58 CB43 CB42
GND GND GND GND X_104P/B 104P
160 GND GND 66 160 GND GND 66
176 74 176 74 CB47
GND GND GND GND CB48 X_104P Micro Star Restricted Secret
DIMM-D184-BK DIMM-D184-BK X_104P/B CB50
104P Title Rev
ADDR.=1010000B CB51
104P
15.FIRST LOGICAL DDR DIMM 130
ADDR.=1010010B CB52 Document Number MS-7050
104P
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 7 of 41
5 4 3 2 1
www.kythuatvitinh.com
5 4 3 2 1
SYSTEM MEMORY DDR Terminational Resisitors
VTT_DDR VTT_DDR
MRAS_B# 1 2 MDQ_B0 1 2
DDR DIMM2 DDR DIMM4 MDQ_B45 3 4 RN35 MDQ_B4 3 4 RN36
MWE_B# 5 6 56 MDQ_B5 5 6 56
MDQ_B41 7 8 MDQ_B1 7 8
XMM2 XMM4 MCS_2H#1 1 2 MDQM_B0 1 2
MA_B0 48 SIGNALS 2 MDQ_B0 MA_B0 48 SIGNALS 2 MDQ_B0 MDQM_B5 3 4 RN37 MDQ_B6 3 4 RN38
(6) MA_B[13..0] A0 DQ0 MDQ_B[0..63] (6) A0 DQ0
MA_B1 43 4 MDQ_B1 MA_B1 43 4 MDQ_B1 MDQS_B5 5 6 56 MDQS_B0 5 6 56
MA_B2 A1 DQ1 MDQ_B2 MA_B2 A1 DQ1 MDQ_B2 MDQ_B42 7 MDQ_B2 7
41 A2 DQ2 6 41 A2 DQ2 6 8 8
D MA_B3 130 8 MDQ_B3 MA_B3 130 8 MDQ_B3 MDQ_B46 1 2 MDQ_B7 1 2 D
MA_B4 A3 DQ3 MDQ_B4 MA_B4 A3 DQ3 MDQ_B4 MDQ_B43 3 RN39 MDQ_B3 3 RN40
37 A4 DQ4 94 37 A4 DQ4 94 4 4
MA_B5 32 95 MDQ_B5 MA_B5 32 95 MDQ_B5 MDQ_B47 5 6 56 MDQ_B12 5 6 56
MA_B6 A5 DQ5 MDQ_B6 MA_B6 A5 DQ5 MDQ_B6 MDQ_B52 7 MDQ_B8 7
125 A6 DQ6 98 125 A6 DQ6 98 8 8
MA_B7 29 99 MDQ_B7 MA_B7 29 99 MDQ_B7 MDQ_B48 1 2 MDQ_B9 1 2
MA_B8 A7 DQ7 MDQ_B8 MA_B8 A7 DQ7 MDQ_B8 MDQ_B49 3 RN41 MDQ_B13 3 RN42
122 A8 DQ8 12 122 A8 DQ8 12 4 4
MA_B9 27 13 MDQ_B9 MA_B9 27 13 MDQ_B9 MDQ_B53 5 6 56 MDQM_B1 5 6 56
MA_B10 A9 DQ9 MDQ_B10 MA_B10 A9 DQ9 MDQ_B10 MA_B13 7 MDQS_B1 7
141 A10/AP DQ10 19 141 A10/AP DQ10 19 8 8
MA_B11 118 20 MDQ_B11 MA_B11 118 20 MDQ_B11 MDQ_B54 1 2 1 2
MA_B12 A11 DQ11 MDQ_B12 MA_B12 A11 DQ11 MDQ_B12 MDQM_B6 3 RN43 MDQ_B14 3 RN44
115 A12/NC DQ12 105 115 A12/NC DQ12 105 4 4
MA_B13 167 106 MDQ_B13 MA_B13 167 106 MDQ_B13 MDQS_B6 5 6 56 MDQ_B15 5 6 56
A13/NC DQ13 MDQ_B14 A13/NC DQ13 MDQ_B14 MDQ_B55 7 MDQ_B10 7
DQ14 109 DQ14 109 8 8
MBA_B0 59 110 MDQ_B15 MBA_B0 59 110 MDQ_B15 MDQ_B50 1 2 MEM_CKEC1 2
(6) MBA_B0 BA0 DQ15 BA0 DQ15
MBA_B1 52 23 MDQ_B16 MBA_B1 52 23 MDQ_B16 MDQ_B60 3 4 RN45 MDQ_B11 3 4 RN46
(6) MBA_B1 BA1 DQ16 BA1 DQ16
113 24 MDQ_B17 113 24 MDQ_B17 MDQ_B51 5 6 56 MEM_CKED5 6 56
NC/BA2 DQ17 MDQ_B18 NC/BA2 DQ17 MDQ_B18 MDQ_B61 7 MDQ_B20 7
DQ18 28 DQ18 28 8 8
MCS_1H#0 157 31 MDQ_B19 MCS_2H#0 157 31 MDQ_B19 MDQ_B56 1 2 MA_B12 1 2
(6) MCS_1H#0 CS0# DQ19 (6) MCS_2H#0 CS0# DQ19
MCS_1H#1 158 114 MDQ_B20 MCS_2H#1 158 114 MDQ_B20 MDQ_B57 3 4 RN47 MDQ_B16 3 4 RN48
(6) MCS_1H#1 CS1# DQ20 (6) MCS_2H#1 CS1# DQ20
71 117 MDQ_B21 71 117 MDQ_B21 MDQM_B7 5 6 56 MDQ_B17 5 6 56
NC/CS2# DQ21 MDQ_B22 NC/CS2# DQ21 MDQ_B22 MDQS_B7 7 MDQ_B21 7
163 NC/CS3# DQ22 121 163 NC/CS3# DQ22 121 8 8
123 MDQ_B23 123 MDQ_B23 MDQ_B62 1 2 MDQ_B18 1 2
MRAS_B# DQ23 MDQ_B24 MRAS_B# DQ23 MDQ_B24 MDQ_B63 3 RN49 MDQ_B22 3 RN50
(6) MRAS_B# 154 RAS# DQ24 33 154 RAS# DQ24 33 4 4
MCAS_B# 65 35 MDQ_B25 MCAS_B# 65 35 MDQ_B25 MDQ_B58 5 6 56 MA_B7 5 6 56
(6) MCAS_B# CAS# DQ25 CAS# DQ25
MWE_B# 63 39 MDQ_B26 MWE_B# 63 39 MDQ_B26 MDQ_B59 7 8 MA_B8 7 8
(6) MWE_B# WE# DQ26 WE# DQ26
40 MDQ_B27 40 MDQ_B27 MA_B2 1 2 MDQ_B23 1 2
MDQS_B0 DQ27 MDQ_B28 MDQS_B0 DQ27 MDQ_B28 RN51 MDQ_B19 3 RN52
(6) MDQS_B[0..7] 5 DQS0 DQ28 126 5 DQS0 DQ28 126 3 4 4
MDQS_B1 14 127 MDQ_B29 MDQS_B1 14 127 MDQ_B29 5 6 56 MA_B5 5 6 56
MDQS_B2 DQS1 DQ29 MDQ_B30 MDQS_B2 DQS1 DQ29 MDQ_B30 MA_B1 MA_B6
25 DQS2 DQ30 131 25 DQS2 DQ30 131 7 8 7 8
MDQS_B3 36 133 MDQ_B31 MDQS_B3 36 133 MDQ_B31 MDQS_B2 1 2 MDQ_B24 1 2
MDQS_B4 DQS3 DQ31 MDQ_B32 MDQS_B4 DQS3 DQ31 MDQ_B32 MA_B11 3 RN57 MDQ_B28 3 RN54
56 DQS4 DQ32 53 56 DQS4 DQ32 53 4 4
MDQS_B5 67 55 MDQ_B33 MDQS_B5 67 55 MDQ_B33 MDQM_B2 5 6 56 MDQ_B29 5 6 56
C MDQS_B6 DQS5 DQ33 MDQ_B34 MDQS_B6 DQS5 DQ33 MDQ_B34 MA_B9 MDQ_B25 7 C
78 DQS6 DQ34 57 78 DQS6 DQ34 57 7 8 8
MDQS_B7 86 60 MDQ_B35 MDQS_B7 86 60 MDQ_B35 MDQS_B3 1 2 MDQ_B26 1 2
DQS7 DQ35 MDQ_B36 DQS7 DQ35 MDQ_B36 MA_B4 RN59 MDQ_B30 3 RN56
47 DQS8 DQ36 146 47 DQS8 DQ36 146 3 4 4
147 MDQ_B37 147 MDQ_B37 MDQM_B3 5 6 56 MDQ_B27 5 6 56
MDQM_B0 DQ37 MDQ_B38 MDQM_B0 DQ37 MDQ_B38 MA_B3 MDQ_B31 7
(6) MDQM_B[0..7] 97 DQM0/DQS9 DQ38 150 97 DQM0/DQS9 DQ38 150 7 8 8
MDQM_B1 107 151 MDQ_B39 MDQM_B1 107 151 MDQ_B39 MCS_2H#0 1 2 MA_B0 1 2
MDQM_B2 DQM1/DQS10 DQ39 MDQ_B40 MDQM_B2 DQM1/DQS10 DQ39 MDQ_B40 MCS_1H#0 3 RN61 MA_B10 3 RN58
119 DQM2/DQS11 DQ40 61 119 DQM2/DQS11 DQ40 61 4 4
MDQM_B3 129 64 MDQ_B41 MDQM_B3 129 64 MDQ_B41 MCAS_B# 5 6 56 MBA_B1 5 6 56
MDQM_B4 DQM3/DQS12 DQ41 MDQ_B42 MDQM_B4 DQM3/DQS12 DQ41 MDQ_B42 MCS_1H#1 7 MDQ_B32 7
149 DQM4/DQS13 DQ42 68 149 DQM4/DQS13 DQ42 68 8 8
MDQM_B5 159 69 MDQ_B43 MDQM_B5 159 69 MDQ_B43 MDQ_B36 1 2
MDQM_B6 DQM5/DQS14 DQ43 MDQ_B44 MDQM_B6 DQM5/DQS14 DQ43 MDQ_B44 MDQ_B37 3 RN60
169 DQM6/DQS15 DQ44 153 169 DQM6/DQS15 DQ44 153 4
MDQM_B7 177 155 MDQ_B45 MDQM_B7 177 155 MDQ_B45 MDQS_B4 5 6 56
DQM7/DQS16 DQ45 MDQ_B46 DQM7/DQS16 DQ45 MDQ_B46 MDQ_B33 7
140 DQM8/DQS17 DQ46 161 140 DQM8/DQS17 DQ46 161 8
162 MDQ_B47 162 MDQ_B47 MDQM_B4 1 2
DQ47 MDQ_B48 DQ47 MDQ_B48 MDQ_B34 3 RN62
44 MECC0 DQ48 72 44 MECC0 DQ48 72 4
45 73 MDQ_B49 45 73 MDQ_B49 MDQ_B38 5 6 56
MECC1 DQ49 MDQ_B50 MECC1 DQ49 MDQ_B50 MDQ_B39 7
49 MECC2 DQ50 79 49 MECC2 DQ50 79 8
51 80 MDQ_B51 51 80 MDQ_B51 MBA_B0 1 2
MECC3 DQ51 MDQ_B52 MECC3 DQ51 MDQ_B52 MDQ_B35 3 RN63
134 MECC4 DQ52 165 134 MECC4 DQ52 165 4
135 166 MDQ_B53 135 166 MDQ_B53 MDQ_B44 5 6 56
MECC5 DQ53 MDQ_B54 MECC5 DQ53 MDQ_B54 R24 120 MDQ_B40 7
142 MECC6 DQ54 170 142 MECC6 DQ54 170 (6) MCLK_1H2 MCLK_1H#2 (6) 8
144 171 MDQ_B55 144 171 MDQ_B55 R25 120
MECC7 DQ55 MECC7 DQ55 (6) MCLK_1H1 MCLK_1H#1 (6)
83 MDQ_B56 83 MDQ_B56 R26 120
DQ56 DQ56 (6) MCLK_1H0 MCLK_1H#0 (6)
MEM_CKEC 21 84 MDQ_B57 MEM_CKED 21 84 MDQ_B57
(6) MEM_CKEC CKE0 DQ57 (6) MEM_CKED CKE0 DQ57
111 87 MDQ_B58 111 87 MDQ_B58 R574 120
CKE1 DQ58 CKE1 DQ58 (6) MCLK_2H2 MCLK_2H#2 (6)
88 MDQ_B59 88 MDQ_B59 R575 120
DQ59 DQ59 (6) MCLK_2H1 MCLK_2H#1 (6)
92 174 MDQ_B60 SMB_CLK 92 174 MDQ_B60 R576 120
(7,16,19,23,25,32,34) SMB_CLK SCL DQ60 SCL DQ60 (6) MCLK_2H0 MCLK_2H#0 (6)
91 175 MDQ_B61 SMB_DATA 91 175 MDQ_B61
(7,16,19,23,25,32,34) SMB_DATA SDA DQ61 SDA DQ61
178 MDQ_B62 178 MDQ_B62
DQ62 MDQ_B63 DQ62 MDQ_B63
VCC_DDR 181 SA0 DQ63 179 181 SA0 DQ63 179
182 SA1 VCC_DDR 182 SA1
B B
183 SA2 NC 9 183 SA2 NC 9
101 101
NC
102
NC
102 DDR_VREF1 DECOUPLING CAPACITORS
NC DDR_VREF1 NC
(6) MCLK_1H1 16 CK0/NC NC 173 (6) MCLK_2H1 16 CK0/NC NC 173
17 17 VTT_DDR VTT_DDR
(6) MCLK_1H#1 CK0#/NC (6) MCLK_2H#1 CK0#/NC VTT_DDR
137 1 137 1 DDR_VREF1
(6) MCLK_1H0 CK1/CK0 VREF (6) MCLK_2H0 CK1/CK0 VREF
138 90 R27 X_10K 138 90 R578 X_10K CB53 CB54
(6) MCLK_1H#0 CK1#/CK0# WP VCC_DDR (6) MCLK_2H#0 CK1#/CK0# WP
76 103 C68 76 103 104P 104P
(6) MCLK_1H2 CK2/NC FETEN/NC (6) MCLK_2H2 CK2/NC FETEN/NC
75 10 104P 75 10 C583 CB55 CB56 CB57
(6) MCLK_1H#2 CK2#/NC NC/RESET# (6) MCLK_2H#2 CK2#/NC NC/RESET# VCC_DDR
104P 104P 104P 104P
82 POWER 15 82 POWER 15 CB58 CB59 CB60
ID_VDD VDDQ VCC_DDR ID_VDD VDDQ VCC_DDR
22 22 104P 104P 104P
VDDQ VDDQ CB61 CB62
VCC_DDR 184 SPD_VDD VDDQ 30 VCC_DDR 184 SPD_VDD VDDQ 30
54 54 X_105P/0805 104P
VDDQ VDDQ VCC_DDR CB63 CB64
VDDQ 62 VDDQ 62
7 77 7 77 104P 104P
VCC_DDR VDD VDDQ VCC_DDR VDD VDDQ
38 96 38 96 CB65 CB66
VDD VDDQ VDD VDDQ VTT_DDR 104P 104P
46 VDD VDDQ 104 46 VDD VDDQ 104
70 112 70 112 CB67 CB68
VDD VDDQ VDD VDDQ 104P 104P
85 VDD VDDQ 128 85 VDD VDDQ 128
108 136 108 136 CB69 CB70 CB71
VDD VDDQ VDD VDDQ 104P 104P 104P
120 VDD VDDQ 143 120 VDD VDDQ 143
148 156 148 156 CB72 CB73 CB74
VDD VDDQ VDD VDDQ 104P 104P 104P
168 VDD VDDQ 164 168 VDD VDDQ 164
172 172 CB75 CB76
VDDQ VDDQ 104P 104P
81 GND VDDQ 180 81 GND VDDQ 180
89 89 CB77 CB78
GND GND 104P 104P
93 GND GND 3 93 GND GND 3
100 11 100 11 CB79 CB80
GND GND GND GND 104P 104P
116 GND GND 18 116 GND GND 18
A 124 26 124 26 CB81 CB82 A
GND GND GND GND X_105P/0805 104P
132 GND GND 34 132 GND GND 34
139 GND GND 42 139 GND GND 42
145 50 145 50 VCC_DDR
GND GND GND GND
152 GND GND 58 152 GND GND 58
160 GND GND 66 160 GND GND 66 Micro Star Restricted Secret
176 GND GND 74 176 GND GND 74
Title Rev
DIMM-D184-BK DIMM-D184-BK 16.SECOND LOGICAL DDR DIMM 130
ADDR.=1010011B Document Number MS-7050
ADDR.=1010001B
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 8 of 41
5 4 3 2 1
www.kythuatvitinh.com
A
B
C
A7 H23 D
VSS1 VSS136
A9 H26
VCORE
VSS2 VSS137
AA6 H28
5
5
VSS3 VSS138
AA8 VSS4 VSS139 J6
AA10 VSS5 VSS140 J8 AA4 VDD1 VDD109 R11
AA12 VSS6 VSS141 J10 AA7 VDD2 VDD110 R13
VCORE
AA14 VSS7 VSS142 J12 AA9 VDD3 VDD111 R15
AA16 VSS8 VSS143 J14 AA11 VDD4 VDD112 R17
AA18 VSS9 VSS144 J16 AA13 VDD5 VDD113 R19
AA20 VSS10 VSS145 J18 AA15 VDD6 VDD114 R21
AA22 VSS11 VSS146 J20 AA17 VDD7 VDD115 T2
AB2 VSS12 VSS147 J22 AA19 VDD8 VDD116 T6
AB7 VSS13 VSS148 J24 AA21 VDD9 VDD117 T8
AB9 VSS14 VSS149 K2 AB6 VDD10 VDD118 T10
AB11 VSS15 VSS150 K7 AB8 VDD11 VDD119 T12
AB13 VSS16 VSS151 K9 AB10 VDD12 VDD120 T14
AB15 VSS17 VSS152 K11 AB12 VDD13 VDD121 T16
AB17 VSS18 VSS153 K13 AB14 VDD14 VDD122 T18
AB19 VSS19 VSS154 K15 AB16 VDD15 VDD123 T20
VCORE
AB21 K17 AB18 U4
C69
VSS20 VSS155 VDD16 VDD124
AB23 VSS21 VSS156 K19 AB20 VDD17 VDD125 U7
AB26 VSS22 VSS157 K21 AC9 VDD18 VDD126 U9
226P/1206/B
AB28 VSS23 VSS158 K23 AC11 VDD19 VDD127 U11
AC4 VSS24 VSS159 K26 AC13 VDD20 VDD128 U13
AC6 VSS25 VSS160 K28 AC15 VDD21 VDD129 U15
AC10 VSS26 VSS161 L4 AC17 VDD22 VDD130 U17
AC12 L6 AC19 U19
C70
VSS27 VSS162 VDD23 VDD131
AC14 VSS28 VSS163 L8 AD2 VDD24 VDD132 U21
AC16 VSS29 VSS164 L10 AD6 VDD25 VDD133 V6
VCC_DDR
226P/1206/B
AC18 L12 AD8 V8
C86
VSS30 VSS165 VDD26 VDD134
AC20 VSS31 VSS166 L14 AD10 VDD27 VDD135 V10
224P/B
AC22 VSS32 VSS167 L16 AD12 VDD28 VDD136 V12
AC24 L18 AD14 V14
C71
VSS33 VSS168 VDD29 VDD137
VCC_DDR
AD7 L20 AD16 V16
C87
VSS34 VSS169 VDD30 VDD138
224P
C81
AD9 VSS35 VSS170 L22 AD18 VDD31 VDD139 V18
226P/1206/B
AD11 VSS36 VSS171 L24 AE4 VDD32 VDD140 V20
AD13 VSS37 VSS172 M7 AE7 VDD33 VDD141 W7
475P/0805/B
AD15 M9 AE9 W9
C88
VSS38 VSS173 VDD34 VDD142
4
4
224P
AD17 M11 AE11 W11
C72
VSS39 VSS174 VDD35 VDD143
AD19 VSS40 VSS175 M13 AJ11 VDD36 VDD144 W13
AD21 VSS41 VSS176 M15 AK5 VDD37 VDD145 W15
475P/0805/B
226P/1206/B
AD23 M17 AK7 W17
C89
VSS42 VSS177 VDD38 VDD146
C82
AD26 VSS43 VSS178 M19 AK9 VDD39 VDD147 W19
AD28 VSS44 VSS179 M21 AK11 VDD40 VDD148 W21
AE6 M23 B5 Y2
C73
VSS45 VSS180 VDD41 VDD149
AE8 M26 B10 Y6
C90
VSS46 VSS181 VDD42 VDD150
475P/0805/B
475P/0805/B
AE10 VSS47 VSS182 M28 B12 VDD43 VDD151 Y8
226P/1206/B
AE12 VSS48 VSS183 N6 D10 VDD44 VDD152 Y10
AE14 VSS49 VSS184 N8 G7 VDD45 VDD153 Y12
AF2 N10 G9 Y14
C91
C83
VSS50 VSS185 VDD46 VDD154
475P/0805/B
AF6 N12 G11 Y16
C74
VSS51 VSS186 VDD47 VDD155
224P/B
AF7 VSS52 VSS187 N14 G13 VDD48 VDD156 Y18
AF9 VSS53 VSS188 N16 H2 VDD49 VDD157 Y20
226P/1206/B
AF11 N18 H6
C92
C84
VSS54 VSS189 VDD50
224P
AF14 VSS55 VSS190 N20 H8 VDD51 VDDIO1 AA23
475P/0805/B
AF16 VSS56 VSS191 N22 H10 VDD52 VDDIO2 AB22
VCC_DDR
AF20 N24 H12 AB24
C75
VSS57 VSS192 VDD53 VDDIO3
AF22 P2 H14 AB30
C85
VSS58 VSS193 VDD54 VDDIO4
224P/B
224P
AF24 VSS59 VSS194 P7 H16 VDD55 VDDIO5 AC21
AF26 VSS60 VSS195 P9 H18 VDD56 VDDIO6 AC23
AF28 VSS61 VSS196 P11 J4 VDD57 VDDIO7 AD20
VTT_DDR
AG5 P13 J7 AD22
C93
VSS62 VSS197 VDD58 VDDIO8
475P/0805/B
AG11 P15 J9 AD24
C76
VSS63 VSS198 VDD59 VDDIO9
AG13 VSS64 VSS199 P17 J11 VDD60 VDDIO10 AD30
224P/B
AG12 VSS65 VSS200 P19 J13 VDD61 VDDIO11 AF30
AH1 P21 J15 AH30
C94
VSS66 VSS201 VDD62 VDDIO12
224P
AH2 VSS67 VSS202 P23 J17 VDD63 VDDIO13 AK16
AH3 VSS68 VSS203 P26 J19 VDD64 VDDIO14 AK18
AH4 P28 K6 AK20
C77
VSS69 VSS204 VDD65 VDDIO15
AH5 R4 K8 AK22
C95
VSS70 VSS205 VDD66 VDDIO16
Bottomside Decoupling
224P/B
224P
AH7 VSS71 VSS206 R6 K10 VDD67 VDDIO17 AK24
AH9 VSS72 VSS207 R8 K12 VDD68 VDDIO18 AK26
AH11 VSS73 VSS208 R10 K14 VDD69 VDDIO19 AK28
AH13 R12 K16 AK30
3
3
VSS74 VSS209 VDD70 VDDIO20
AH16 R14 K18 B16
C78
VSS75 VSS210 VDD71 VDDIO21
AH18 VSS76 VSS211 R16 K20 VDD72 VDDIO22 B18
224P/B
AH20 VSS77 VSS212 R18 L7 VDD73 VDDIO23 B20
AH22 VSS78 VSS213 R20 L9 VDD74 VDDIO24 B22
AH24 VSS79 VSS214 R22 L11 VDD75 VDDIO25 B24
AH26 R24 L13 B26
C79
VSS80 VSS215 VDD76 VDDIO26
AH28 VSS81 VSS216 T7 L15 VDD77 VDDIO27 B28
224P/B
AJ3 VSS82 VSS217 T9 L17 VDD78 VDDIO28 B30
AJ13 VSS83 VSS218 T11 L19 VDD79 VDDIO29 D30
AK13 VSS84 VSS219 T13 L21 VDD80 VDDIO30 F30
AL13 T15 M2 H20
C80
VSS85 VSS220 VDD81 VDDIO31
B7 VSS86 VSS221 T17 M6 VDD82 VDDIO32 H22
224P/B
B9 T19 M8 H24
SLOTOCC1#
VSS87 VSS222 VDD83 VDDIO33
C2 VSS88 VSS223 T21 M10 VDD84 VDDIO34 H30
C8 VSS89 VSS224 T23 M12 VDD85 VDDIO35 J21
C9 VSS90 VSS225 T26 M14 VDD86 VDDIO36 J23
D2 VSS91 VSS226 T28 M16 VDD87 VDDIO37 K22
D3 VSS92 VSS227 U6 M18 VDD88 VDDIO38 K24
D5 VSS93 VSS228 U8 M20 VDD89 VDDIO39 K30
D6 VSS94 VSS229 U10 N4 VDD90 VDDIO40 L23
D7 VSS95 VSS230 U12 N7 VDD91 VDDIO41 M22
D9 U14 N9 M24
SLOTOCC1# (24)
VSS96 VSS231 VDD92 VDDIO42
D13 VSS97 VSS232 U16 N11 VDD93 VDDIO43 M30
D16 VSS98 VSS233 U18 N13 VDD94 VDDIO44 N23
D18 VSS99 VSS234 U20 N15 VDD95 VDDIO45 P22
D20 VSS100 VSS235 U22 N17 VDD96 VDDIO46 P24
D22 VSS101 VSS236 U24 N19 VDD97 VDDIO47 P30
D24 VSS102 VSS237 V2 N21 VDD98 VDDIO48 R23
D26 VSS103 VSS238 V7 P6 VDD99 VDDIO49 T22
D28 VSS104 VSS239 V9 P8 VDD100 VDDIO50 T24
E3 VSS105 VSS240 V11 P10 VDD101 VDDIO51 T30
E4 VSS106 VSS241 V13 P12 VDD102 VDDIO52 U23
E10 VSS107 VSS242 V15 P14 VDD103 VDDIO53 V22
E12 VSS108 VSS243 V17 P16 VDD104 VDDIO54 V24
2 G12 VSS109 VSS244 V19 P18 VDD105 VDDIO55 V30
2
F5 VSS110 VSS245 V21 P20 VDD106 VDDIO56 W23
F6 VSS111 VSS246 V23 R7 VDD107 VDDIO57 Y22
F7 VSS112 VSS247 V26 R9 VDD108 VDDIO58 Y30
F9 VSS113 VSS248 V28
F10 VSS114 VSS249 W4
F12 VSS115 VSS250 W6
F14 W8
POWER
CPU1E
VSS116 VSS251
F16 VSS117 VSS252 W10
F18 VSS118 VSS253 W12
F22 VSS119 VSS254 W14
F24 VSS120 VSS255 W16
F26 VSS121 VSS256 W18
F28 VSS122 VSS257 W20
G4 VSS123 VSS258 W22
G6 VSS124 VSS259 W24
G8 VSS125 VSS260 Y7
G10 VSS126 VSS261 Y9
G14 VSS127 VSS262 Y11
H7 VSS128 VSS263 Y13
H9 VSS129 VSS264 Y15
H11 VSS130 VSS265 Y17
H13 VSS131 VSS266 Y19
H15 VSS132 VSS267 Y21
H17 Y23
Title
VSS133 VSS268
H19 VSS134 VSS269 Y26
H21 VSS135 VSS270 Y28
CPU1F
GROUND
Document Number
Taipei Hsien, Taiwan
http://www.msi.com.tw
No. 69, Li-De St, Jung-He City,
1
1
MICRO-STAR INT'L CO.,LTD.
MS-7050
www.kythuatvitinh.com
Sheet
Micro Star Restricted Secret
9
07.ATHLON64 PWR & GND
Last Revision Date:
of 41
Wednesday, July 06, 2005
Rev
130
A
B
C
D
5 4 3 2 1
U1A
HT_CADOUT_H15 T26 R24 HT_CADIN_H15
(5) HT_CADOUT_H[15..0] HT_RXCAD15P HT_TXCAD15P HT_CADIN_L15 HT_CADIN_H[15..0] (5)
HT_CADOUT_L15 R26 PART 1OF6 R25
(5) HT_CADOUT_L[15..0] HT_RXCAD15N HT_TXCAD15N HT_CADIN_H14 HT_CADIN_L[15..0] (5)
HT_CADOUT_H14 U25 N26
D HT_CADOUT_L14 HT_RXCAD14P HT_TXCAD14P HT_CADIN_L14 D
U24 HT_RXCAD14N HT_TXCAD14N P26
HT_CADOUT_H13 V26 N24 HT_CADIN_H13
HT_CADOUT_L13 HT_RXCAD13P HT_TXCAD13P HT_CADIN_L13
U26 HT_RXCAD13N HT_TXCAD13N N25
HT_CADOUT_H12 W25 L26 HT_CADIN_H12
HT_CADOUT_L12 HT_RXCAD12P HT_TXCAD12P HT_CADIN_L12
W24 HT_RXCAD12N HT_TXCAD12N M26
HT_CADOUT_H11 AA25 J26 HT_CADIN_H11
HT_CADOUT_L11 HT_RXCAD11P HT_TXCAD11P HT_CADIN_L11
AA24 HT_RXCAD11N HT_TXCAD11N K26
HT_CADOUT_H10 AB26 J24 HT_CADIN_H10
HT_CADOUT_L10 HT_RXCAD10P HT_TXCAD10P HT_CADIN_L10
AA26 HT_RXCAD10N HT_TXCAD10N J25
HT_CADOUT_H9 AC25 G26 HT_CADIN_H9
HT_CADOUT_L9 HT_RXCAD9P HT_TXCAD9P HT_CADIN_L9
AC24 HT_RXCAD9N HT_TXCAD9N H26
HT_CADOUT_H8 AD26 G24 HT_CADIN_H8
HT_CADOUT_L8 HT_RXCAD8P HT_TXCAD8P HT_CADIN_L8
AC26 HT_RXCAD8N HT_TXCAD8N G25
HT_CADOUT_H7 R29 L30 HT_CADIN_H7
HT_CADOUT_L7 HT_RXCAD7P HT_TXCAD7P HT_CADIN_L7
R28 HT_RXCAD7N HT_TXCAD7N M30
HT_CADOUT_H6 T30 L28 HT_CADIN_H6
HT_CADOUT_L6 HT_RXCAD6P HT_TXCAD6P HT_CADIN_L6
R30 HT_RXCAD6N HT_TXCAD6N L29
HT_CADOUT_H5 T28 J29 HT_CADIN_H5
HYPER TRANSPORT CPU I/F
HT_CADOUT_L5 HT_RXCAD5P HT_TXCAD5P HT_CADIN_L5
T29 HT_RXCAD5N HT_TXCAD5N K29
HT_CADOUT_H4 V29 H30 HT_CADIN_H4
HT_CADOUT_L4 HT_RXCAD4P HT_TXCAD4P HT_CADIN_L4
U29 HT_RXCAD4N HT_TXCAD4N H29
HT_CADOUT_H3 Y30 E29 HT_CADIN_H3
HT_CADOUT_L3 HT_RXCAD3P HT_TXCAD3P HT_CADIN_L3
W30 HT_RXCAD3N HT_TXCAD3N E28
HT_CADOUT_H2 Y28 D30 HT_CADIN_H2
HT_CADOUT_L2 HT_RXCAD2P HT_TXCAD2P HT_CADIN_L2
Y29 HT_RXCAD2N HT_TXCAD2N E30
HT_CADOUT_H1 AB29 D28 HT_CADIN_H1
HT_CADOUT_L1 HT_RXCAD1P HT_TXCAD1P HT_CADIN_L1
AA29 HT_RXCAD1N HT_TXCAD1N D29
HT_CADOUT_H0 AC29 B29 HT_CADIN_H0
HT_CADOUT_L0 HT_RXCAD0P HT_TXCAD0P HT_CADIN_L0
AC28 HT_RXCAD0N HT_TXCAD0N C29
C C
(5) HT_CLKOUT_H1 Y26 HT_RXCLK1P HT_TXCLK1P L24 HT_CLKIN_H1 (5)
(5) HT_CLKOUT_L1 W26 HT_RXCLK1N HT_TXCLK1N L25 HT_CLKIN_L1 (5)
(5) HT_CLKOUT_H0 W29 HT_RXCLK0P HT_TXCLK0P F29 HT_CLKIN_H0 (5)
(5) HT_CLKOUT_L0 W28 HT_RXCLK0N HT_TXCLK0N G29 HT_CLKIN_L0 (5)
(5) HT_CTLOUT_H0 P29 HT_RXCTLP HT_TXCTLP M29 HT_CTLIN_H0 (5)
(5) HT_CTLOUT_L0 N29 HT_RXCTLN HT_TXCTLN M28 HT_CTLIN_L0 (5)
VCCA_1V2 R28 49.9RST HT_RXCALN D27 B28 HT_TXCALP 100RST R29
R30 49.9RST HT_RXCALP HT_RXCALN HT_TXCALP HT_TXCALN
E27 HT_RXCALP HT_TXCALN A28
RS480
B B
A A
Micro Star Restricted Secret
Title Rev
08.RS480-HT LINK0 I/F 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 10 of 41
5 4 3 2 1
5 4 3 2 1
U1C
D AF17 AF28 D
MEM_A0 MEM_DQ0
AK17 MEM_A1 PART 3 OF 6 MEM_DQ1 AF27
AH16 MEM_A2 MEM_DQ2 AG28
AF16 MEM_A3 MEM_DQ3 AF26
AJ22 MEM_A4 MEM_DQ4 AE25
AJ21 MEM_A5 MEM_DQ5 AE24
AH20 MEM_A6 MEM_DQ6 AF24
AH21 MEM_A7 MEM_DQ7 AG23
AK19 MEM_A8 MEM_DQ8 AE29
AH19 MEM_A9 MEM_DQ9 AF29
AJ17 MEM_A10 MEM_DQ10 AG30
AG16 MEM_A11 MEM_DQ11 AG29
AG17 MEM_A12 MEM_DQ12 AH28
AH17 MEM_A13 MEM_DQ13 AJ28
AJ18 MEM_A14 MEM_DQ14 AH27
MEM_DQ15 AJ27
AG26 MEM_DM0 MEM_DQ16 AE23
AJ29 MEM_DM1 MEM_DQ17 AG22
AE21 MEM_DM2 MEM_DQ18 AF23
+1.8V_S0 AH24 AF22
MEM_DM3 MEM_DQ19
AH12 MEM_DM4 MEM_DQ20 AE20
AG13 MEM_DM5 MEM_DQ21 AG19
AH8 MEM_DM6 MEM_DQ22 AF20
AE8 MEM_DM7 MEM_DQ23 AF19
MEM_DQ24 AH26
C96 C97 C98 C99 AF25 AJ26
102P 102P 104P 104P MEM_DQS0P MEM_DQ25
AH30 MEM_DQS1P MEM_DQ26 AK26
AG20 MEM_DQS2P MEM_DQ27 AH25
AJ25 MEM_DQS3P MEM_DQ28 AJ24
(38) IDCKP AH13 MEM_DQS4P MEM_DQ29 AH23
C AF14 AJ23 C
MEM_DQS5P MEM_DQ30
AJ7 MEM_DQS6P MEM_DQ31 AH22
AG8 MEM_DQS7P MEM_DQ32 AK14 TP24
MEM_A I/F
CLOSE TO AH14
CHIPSET MEM_DQ33 MDA33 (38)
AG25 MEM_DQS0N MEM_DQ34 AK13 MDA34 (38)
AH29 MEM_DQS1N MEM_DQ35 AJ13 MDA35 (38)
AF21 MEM_DQS2N MEM_DQ36 AJ11 MDA36 (38)
AK25 MEM_DQS3N MEM_DQ37 AH11 MDA37 (38)
(38) IDCKN AJ12 MEM_DQS4N MEM_DQ38 AJ10 MDA38 (38)
AF13 MEM_DQS5N MEM_DQ39 AH10 MDA39 (38)
AK7 MEM_DQS6N MEM_DQ40 AE15 TP25
AF9 MEM_DQS7N MEM_DQ41 AF15 TP26
MEM_DQ42 AG14 TP27
AE17 MEM_RAS# MEM_DQ43 AE14 TP28
AH18 MEM_CAS# MEM_DQ44 AE12 TP29
AE18 MEM_WE# MEM_DQ45 AF12 TP30
AJ19 MEM_CS# MEM_DQ46 AG11 TP31
AF18 MEM_CKE MEM_DQ47 AE11 TP32
MEM_DQ48 AJ9 MDA48 (38)
AK16 MEM_CKP MEM_DQ49 AH9 MDA49 (38)
AJ16 MEM_CKN MEM_DQ50 AJ8 MDA50 (38)
Change for PA_RS480F1.PDF AK8
MEM_DQ51 MDA51 (38)
MEM_DQ52 AH7 MDA52 (38)
+1.8V_S0 AJ6
MEM_DQ53 MDA53 (38)
MEM_DQ54 AH6 MDA54 (38)
R31 X_474P C100 AE28 AJ5
MEM_CAP1 MEM_DQ55 MDA55 (38)
1KST X_474P C101 AJ4 AG10
MEM_CAP2 MEM_DQ56 TP33
MEM_DQ57 AF11 TP34
+1.8V_S0 MEM_DQ58 AF10 TP35
MEM_DQ59 AE9 TP36
B AJ20 AG7 B
MEM_VMODE MEM_DQ60 TP37
C102 R32 AF8
MEM_DQ61 TP38
X_104P 1KST AF7
MEM_DQ62 TP39
AK20 MEM_VREF MEM_DQ63 AE7 TP40
MEM_VREF
AJ15 AH5 MBM_COMPPR33 61.9RST
C103 C104 MPVDD MEM_COMPP
AJ14 MPVSS MEM_COMPN AD30
102P 104P R34 MBM_COMPN +1.8V_S0
1KST RS480
R35 61.9RST
L2 X_30S/0805 MPVDD_PLL Change for PA_RS480F1.PDF
+1.8V_S0
2 1 C105 105P/B
CP2
A A
Micro Star Restricted Secret
Title Rev
09.RS480-SIDE PORT MEMORY I/F 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 11 of 41
5 4 3 2 1
5 4 3 2 1
PLACE THESE CAP CLOSE
TO CONNECTOR
D U1B D
PART 2 OF 6
(23) GFX_RX0P D8 A7 GFX_TX0P_C C106 104P
GFX_RX0P GFX_TX0P GFX_TX0P (23)
(23) GFX_RX0N D7 B7 GFX_TX0N_C C107 104P
GFX_RX0N GFX_TX0N GFX_TX0N (23)
(23) GFX_RX1P D5 B6 GFX_TX1P_C C108 104P
GFX_RX1P GFX_TX1P GFX_TX1P (23)
(23) GFX_RX1N D4 B5 GFX_TX1N_C C109 104P
GFX_RX1N GFX_TX1N GFX_TX1N (23)
(23) GFX_RX2P E4 A5 GFX_TX2P_C C110 104P
GFX_RX2P GFX_TX2P GFX_TX2P (23)
(23) GFX_RX2N F4 A4 GFX_TX2N_C C111 104P
GFX_RX2N GFX_TX2N GFX_TX2N (23)
(23) GFX_RX3P G5 B3 GFX_TX3P_C C112 104P
GFX_RX3P GFX_TX3P GFX_TX3P (23)
(23) GFX_RX3N G4 B2 GFX_TX3N_C C113 104P
GFX_RX3N GFX_TX3N GFX_TX3N (23)
(23) GFX_RX4P H4 C1 GFX_TX4P_C C114 104P
GFX_RX4P GFX_TX4P GFX_TX4P (23)
(23) GFX_RX4N J4 D1 GFX_TX4N_C C115 104P
GFX_RX4N GFX_TX4N GFX_TX4N (23)
(23) GFX_RX5P H5 D2 GFX_TX5P_C C116 104P
GFX_RX5P GFX_TX5P GFX_TX5P (23)
(23) GFX_RX5N H6 E2 GFX_TX5N_C C117 104P
GFX_RX5N GFX_TX5N GFX_TX5N (23)
(23) GFX_RX6P G1 F2 GFX_TX6P_C C118 104P
GFX_RX6P GFX_TX6P GFX_TX6P (23)
(23) GFX_RX6N G2 F1 GFX_TX6N_C C119 104P
GFX_RX6N GFX_TX6N GFX_TX6N (23)
(23) GFX_RX7P K5 H2 GFX_TX7P_C C120 104P
PCIE I/F TO VIDEO
GFX_RX7P GFX_TX7P GFX_TX7P (23)
(23) GFX_RX7N K4 J2 GFX_TX7N_C C121 104P
GFX_RX7N GFX_TX7N GFX_TX7N (23)
(23) GFX_RX8P L4 J1 GFX_TX8P_C C122 104P
GFX_RX8P GFX_TX8P GFX_TX8P (23)
(23) GFX_RX8N M4 K1 GFX_TX8N_C C123 104P
GFX_RX8N GFX_TX8N GFX_TX8N (23)
(23) GFX_RX9P N5 K2 GFX_TX9P_C C124 104P
GFX_RX9P GFX_TX9P GFX_TX9P (23)
(23) GFX_RX9N N4 L2 GFX_TX9N_C C125 104P
GFX_RX9N GFX_TX9N GFX_TX9N (23)
(23) GFX_RX10P P4 M2 GFX_TX10P_C C126 104P
GFX_RX10P GFX_TX10P GFX_TX10P (23)
(23) GFX_RX10N R4 M1 GFX_TX10N_C C127 104P
GFX_RX10N GFX_TX10N GFX_TX10N (23)
(23) GFX_RX11P P5 N1 GFX_TX11P_C C128 104P
GFX_RX11P GFX_TX11P GFX_TX11P (23)
(23) GFX_RX11N P6 N2 GFX_TX11N_C C129 104P
GFX_RX11N GFX_TX11N GFX_TX11N (23)
(23) GFX_RX12P P2 R1 GFX_TX12P_C C130 104P
GFX_RX12P GFX_TX12P GFX_TX12P (23)
(23) GFX_RX12N R2 T1 GFX_TX12N_C C131 104P
GFX_RX12N GFX_TX12N GFX_TX12N (23)
(23) GFX_RX13P T5 T2 GFX_TX13P_C C132 104P
GFX_RX13P GFX_TX13P GFX_TX13P (23)
(23) GFX_RX13N T4 U2 GFX_TX13N_C C133 104P
GFX_RX13N GFX_TX13N GFX_TX13N (23)
C
(23) GFX_RX14P U4 V2 GFX_TX14P_C C134 104P C
GFX_RX14P GFX_TX14P GFX_TX14P (23)
(23) GFX_RX14N V4 V1 GFX_TX14N_C C135 104P
GFX_RX14N GFX_TX14N GFX_TX14N (23)
(23) GFX_RX15P W1 Y2 GFX_TX15P_C C136 104P
GFX_RX15P GFX_TX15P GFX_TX15P (23)
(23) GFX_RX15N W2 AA2 GFX_TX15N_C C137 104P
GFX_RX15N GFX_TX15N GFX_TX15N (23)
(23) GPP_RX0P AE1 AD2 GPP_TX0P_C C138 104P
GPP_RX0P/SB_RX2P GPP_TX0P/SB_TX2P GPP_TX0P (23)
(23) GPP_RX0N AE2 AD1 GPP_TX0N_C C139 104P
GPP_RX0N/SB_RX2N GPP_TX0N/SB_TX2N GPP_TX0N (23)
(32) GPP_RX1P AB2 AA1 GPP_TX1P_C C140 104P
GPP_RX1P/SB_RX3P GPP_TX1P/SB_TX3P GPP_TX1P (32)
(32) GPP_RX1N AC2 AB1 GPP_TX1N_C C141 104P
GPP_RX1N/SB_RX3N GPP_TX1N/SB_TX3N GPP_TX1N (32)
AB5 GPP_RX2P PCIE I/F TO SLOT GPP_TX2P Y5
AB4 GPP_RX2N GPP_TX2N Y6
Y4 GPP_RX3P GPP_TX3P W5
AA4 GPP_RX3N GPP_TX3N W4
(18) A_RX0P AG1 AF2 SB_TX0P_C C142 104P
SB_RX0P SB_TX0P A_TX0P (18)
(18) A_RX0N AH1 AG2 SB_TX0N_C C143 104P
SB_RX0N SB_TX0N A_TX0N (18)
PCIE I/F TO SB SB_TX1P_C C144 104P
(18) A_RX1P AC5 SB_RX1P SB_TX1P AC4 A_TX1P (18)
(18) A_RX1N AC6 AD4 SB_TX1N_C C145 104P
SB_RX1N SB_TX1N A_TX1N (18)
R36 10KST AH3 AH2 R37 150RST
R38 8.25KST AJ3 PCE_ISET PCE_PCAL
PCE_TXISET PCE_NCAL AJ2 R39 82RST VCCA_1V2
RS480
B B
A A
Micro Star Restricted Secret
Title Rev
10.RS480-PCIE LINK I/F 130
Document Number MS-7050
www.kythuatvitinh.com
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 12 of 41
5 4 3 2 1
5 4 3 2 1
AVDD
(2.5V)
C146
105P +3.3V AVDD
L4 240S
D U1D C627 D
B27 PART 4 OF 6 X_104P
AVDDQ +1.8V_S0 AVDD1
C27 AVDD2 RESERVED1 D18
D26 AVSSN1 RESERVED2 C18
+1.8V_S0 AVDDQ (1.8V) D25 B19
L6 240S AVSSN2 RESERVED3
C24 AVDDDI RESERVED4 A19
B24 AVSSDI RESERVED5 D19
C147 C148 C19
105P 105P RESERVED6
E24 AVDDQ RESERVED7 D20
D24 AVSSQ RESERVED8 C20
B25 C RESERVED9 B16
+3V_Dual A25 A16
Y RESERVED10
A24 D16
CRT/TVOUT
R626 10K COMP RESERVED11
RESERVED12 C16
5
(17) R C25 RED RESERVED13 B17
1 (17) G A26 GREEN RESERVED14 A17
4 NB_PWRGD_G B26 E17
(17) B BLUE RESERVED15
(24,34,35) NB_PWRGD 2 RESERVED16 D17
U50 A11
(17) VSYNC# DACVSYNC
NC7SZ126M5 B11 B20
(17) HSYNC#
3
R40 680RST C26 DACHSYNC RESERVED17
RSET RESERVED18 A20
1% E11 B18
+1.8V_S0 (17) DAC_SCL DACSCL RESERVED19 +1.8V_S0
(17) DAC_SDAT F11 DACSDA RESERVED20 C17
L8
R627 X_0 L7 240S E18
VDD18_E18
VSS_F17 F17 241S
C149 A14 E19
105P PLLVDD VDD18_E19
B14 PLLVSS VDD18_G20 G20
VDD18_H20 H20
C +1.8V_S0 +1.8V_S0 M23 C150 C151 C
HTPVDD
PLL PWR
L9 150 L23 G19 X_104P 105P/B
HTPVSS VSS_G19
VSS_E20 E20
C152 F20
R41 105P/B VSS_F20
VSS_H18 H18
4.7K D14 G18
(18,24,29,34) PCIRST# SYSRESET# VSS_G18
NB_PWRGD_G B15 F19
POWERGOOD VSS_F19
(19) SUS_STAT# (5,18) LDTSTOP# B12 LDTSTOP# VSS_H19 H19
C12 F18
PM
+3.3V (18) ALLOW_LDTSTOP ALLOW_LDTSTOP VSS_F18
AH4 SUS_STAT#
L10 X_80S E14
C153 GPIO3
GPIO2 F14
2 1 H13 VDDR3_1 GPIO4 F13
105P H12
CP9 VDDR3_2
GFX_CLKP B8 NBSRCCLK (16)
(16) OSC14M A13 OSCIN GFX_CLKN A8 NBSRCCLK# (16)
R42 X_22 SB_OSC_INT_R B13
(19) SB_OSC_INT OSCOUT
P23 R43 10K/B
CLOCKs HTTSTCLK
HTREFCLK N23 HTREFCLK (16)
SB_CLKP E8 SBLINKCLK (16)
TVCLKIN R44 X_0 B9 E7
(23) TVCLKIN TVCLKIN SB_CLKN SBLINKCLK# (16)
(15) SPMEM_EN# SPMEM_EN# F12 C13 DFT_GPIO3 X_3K R45
LOAD_ROM# DFT_GPIO0/RSV DFT_GPIO3/RSV DFT_GPIO4 X_3K R46
(15) LOAD_ROM# E13 DFT_GPIO1/RSV DFT_GPIO4/RSV C14
R47 X_3K DFT_GPIO2 D13 C15 DFT_GPIO5 X_3K R48
DFT_GPIO2/RSV DFT_GPIO5/RSV
TMDS_HPD A10 TMDS_HPD (23)
(18) BMREQ# F10 BMREQb
B I2C_CLK C10 E10 STRP_DATA B
(23,38) I2C_CLK I2C_CLK STRP_DATA
I2C_DATA C11
(23) I2C_DATA
(24) NB_THRMDA AF4
I2C_DATA
THERMALDIODE_P
MIS. DDC_DATA B10 DDC_DATA DDC_DATA (38)
(24) NB_THRMDC AE4 THERMALDIODE_N
TESTMODE E12
RS480
R49 +3.3V
1.8K
+3.3V R50
2K
U2
1 5 STRP_DATA
A0 SDA I2C_CLK
2 A1 SCL 6
3 A2
VCC 8 +3.3V
R51 R52 R653 R53 X_1K 7 4 R54
+3.3V WP GND
4.7K 4.7K 2K X_2K
X_AT24C04N C154
I2C_CLK PROTO X_104P
I2C_DATA
DDC_DATA
NOTE: Provide access to STRAP_DATA and I2C_CLK pins
A is MANDATORY. A
AVDD DAC VDD (2.5V)
AVDDDI DIGITAL VDD (1.8V) Micro Star Restricted Secret
DAC2 BANDGAP REF (1.8V) Title Rev
11.RS480-VIDEO I/F & CLKGEN 130
PLLVDD PLL VDD (1.8V)
Document Number MS-7050
HTPVDD HT PLL VDD (1.2V)
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 13 of 41
5 4 3 2 1
5 4 3 2 1
NB RS480 POWER STATES
VSSA22
VSSA59
Power Signal S0 S1 S3 S4/S5 G3
VDDHT ON ON OFF OFF OFF
VDDR,VDDRCK ON ON OFF OFF OFF
VDD18 ON ON OFF OFF OFF
AG3
AD3
AD5
AD6
M24
M27
AE5
AA6
AA3
AB3
AE3
AB7
AA5
AB8
AF3
H28
N19
H24
N28
U28
R23
K28
P25
P28
E26
K25
V25
V28
AJ1
F28
T23
L27
J28
W3
M6
M8
M5
M3
M7
G3
R5
N3
R3
C5
C3
D3
C6
C8
C9
C7
R6
D6
C4
H7
H8
C2
U5
U6
V5
Y8
V3
K8
A2
P8
V8
B4
P7
K3
Y7
K7
V6
V7
E6
E5
F7
F5
T3
F8
F3
T7
F6
T8
L6
L5
J6
J5
J3
VDDC ON ON OFF OFF OFF
U1F
VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
VSSA52
VSSA53
VSSA54
VSSA55
VSSA56
VSSA57
VSSA58
VSSA59
VSSA60
VSSA61
VSSA62
VSSA63
VSSA64
VSSA65
VSSA66
VSSA67
VSSA68
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
RS480 VDDA18 ON ON OFF OFF OFF
D VDDA12 ON ON OFF OFF OFF D
AVDD ON ON OFF OFF OFF
PAR 6 OF 6
AVDDDI ON ON OFF OFF OFF
GROUND PLLVDD ON ON OFF OFF OFF
HTPVDD ON ON OFF OFF OFF
VDDR3 ON ON OFF OFF OFF
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
LPVDD ON ON OFF OFF OFF
LVDDR18 ON ON OFF OFF OFF
G10
G12
AD29
AD27
AC27
G15
G14
Y24
G13
E9
D15
D9
AD9
G11
F16
G30
AB28
AB25
D12
AD24
AA28
G17
Y23
AC9
R19
Y27
C28
G16
F25
B30
T24
F26
W27
D11
H11
AD25
H17
H10
H16
H14
E16
D10
E15
F15
U15
V14
R15
T14
N15
V12
N13
P14
U17
T16
R17
P12
T12
R13
W13
W17
P18
V18
M18
U13
N17
W15
V16
T18
M14
M12
M16
P16
U19
AG5
AG6
AG9
AC16
T27
AG18
AC23
AD8
AD11
AD13
AD16
AD19
AD23
AG21
AD17
AG15
AG12
AF30
AG24
AC19
AK10
AE27
AG27
AC11
AD7
AJ30
AC21
AK5
AC13
AD21
AK22
AK29
W19
AE26
R27
AD28
F24
F27
G28
LVDDR25 ON ON OFF OFF OFF
VSS89
VSS30
U1E VCCA_1V2
VCCA_1V2 PART 5 OF 6 VDDA_12_14 H9
N27 VDD_HT1 VDDA_12_1 AA7
U27 VDD_HT2 VDDA_12_2 G9
V27 U8 C164 C165 C166 C167 C168
C C155 C156 C157 C158 VDD_HT3 VDDA_12_3 C163 104P X_104P 225P/B 226P/1206/B C
G27 VDD_HT4 VDDA_12_4 N7
104P/B 104P/B 105P/B V24 N8 105P 225P/B
106P/1206/B VDD_HT5 VDDA_12_5
H27 VDD_HT6 VDDA_12_6 U7
K24 VDD_HT7 VDDA_12_7 F9
AB24 VDD_HT8 VDDA_12_8 AA8
VCCA_1V2 P27 G8
VDD_HT9 VDDA_12_9
J27 VDD_HT10 VDDA_12_10 G7
AA27 VDD_HT11 VDDA_12_11 J8
K27 VDD_HT12 VDDA_12_12 J7
P24 B1 VDDA12_13 VDDA18 +1.8V_S0
C159 C161 C162 C160 VDD_HT13 VDDA_12_13 L11 60S
AB27 VDD_HT14 VDDA_18_1 AG4
X_104P 104P 104P X_104P AB23 R8
VDD_HT15 VDDA_18_2 C171 C172 C173
V23 VDD_HT16 VDDA_18_3 AC8
G23 AC7 C169 C170 104P/B 104P X_104P
VDD_HT17 VDDA_18_4 105P/B 105P/B
E23 VDD_HT18 VDDA_18_5 AF6
W23 VDD_HT19 VDDA_18_6 AE6
K23 VDD_HT20 VDDA_18_7 L8
J23 VDD_HT21 VDDA_18_8 W8
H23 VDD_HT22 VDDA_18_9 W7
U23 VDD_HT23 VDDA_18_10 L7
AA23 VDD_HT24 VDDA_18_11 R7
D23 AF5 VCCA_1V2
VDD_HT25 VDDA_18_12 VDDA18_13
F23 VDD_HT26 VDDA_18_13 AK2
C23 VDD_HT27 VDD_CORE1 N16
B23 M13 VDDA12_13
VDD_HT28 VDD_CORE2 C174 C175 C176 C177 C178 C179
A23 VDD_HT29 VDD_CORE3 M15
VDDHT30 A29 W16 104P/B 225P/B 104P 104P C180
VDDHT31 VDD_HT30 VDD_CORE4 226P/1206/B 226P/1206/B 106P/1206
AC30 VDD_HT31 VDD_CORE5 N18
+1.8V_S0 P19
VDD_CORE6 VSSA22
AK23 VDD_MEM1 VDD_CORE7 N12
B AK28 P15 B
C181 VDD_MEM2 VDD_CORE8 VDDA18_13
AK11 VDD_MEM3 VDD_CORE9 N14
C182 C183 C184 C185 C186 C187 AK4 M17
X_106P/1206/B 104P/B 104P/B 102P 102P 102P 102P VDD_MEM4 VDD_CORE10 C191
AE30 VDD_MEM5 VDD_CORE11 T19
AC14 G22 C188 C189 C190 106P/1206
VDD_MEM6 VDD_CORE12 105P/B 105P/B 105P/B
AD12 VDD_MEM7 VDD_CORE13 R12
AC18 P13 VSSA59
VDD_MEM8 VDD_CORE14
AC20 VDD_MEM9 VDD_CORE15 R14 THE CAPS SHOULD PLACE UNDER
AD10 V19 VDDHT30
AD14
VDD_MEM10 VDD_CORE16
R18 NB, ALL GND USE COPPER FLOOD
VDD_MEM11 VDD_CORE17 C192
AD15 VDD_MEM12 VDD_CORE18 U16 TOGETHER, AND NB POWER VIA
AD20 U12 106P/1206
AC10
VDD_MEM13 VDD_CORE19
T13
TREAT AS SAME.
VDD_MEM14 VDD_CORE20 VSS30
AD18 VDD_MEM15 VDD_CORE21 U14
AC12 VDD_MEM16 VDD_CORE22 T17
AD22 U18 VDDHT31
VDD_MEM17 VDD_CORE23
AC22 VDD_MEM18 VDD_CORE24 E22
AH15 R16 C193
+1.8V_S0 VDD18 VDD_MEMCK VDD_CORE25 106P/1206
VDD_CORE26 V13
L12 X_241S H15 T15
POWER
VDD_18_1 VDD_CORE27 VSS89
AC17 VDD_18_2 VDD_CORE28 P17
1 2 AC15 VDD_18_3 VDD_CORE29 W18
C194 C195 C196 C197 C198 D22
CP11 X_104P 104P 104P 104P/B 105P/B VDD_CORE30
B21 VDD_CORE47 VDD_CORE31 W12
C21 VDD_CORE46 VDD_CORE32 V15 PUT DECOUPLING CAPS ON THE TOP, CLOSE
A22 VDD_CORE45 VDD_CORE33 W14 TO BALLS
B22 VDD_CORE44 VDD_CORE34 V17
C22 VDD_CORE43 VDD_CORE35 M19
F21 VDD_CORE42 VDD_CORE36 H22
F22 VDD_CORE41 VDD_CORE37 H21
A E21 D21 A
VDD_CORE40 VDD_CORE38
G21 VDD_CORE39
RS480
Micro Star Restricted Secret
Title Rev
12.RS480-POWER 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, July 05, 2005
Taipei Hsien, Taiwan Sheet
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http://www.msi.com.tw 14 of 41
5 4 3 2 1
5 4 3 2 1
D D
ATI has internal pull up
C C
LOAD_ROM#:LOAD ROM STRAP ENABLE strap
R55 X_3K
+3.3V
R56 X_3K High, LOAD ROM STRAP DISABLE
(13) LOAD_ROM#
Low, LOAD ROM STRAP ENABLE
ATI has internal pull up
R57 X_3K SPMEM_EN#:SIDE PORT MEMORY ENABLE strap
+3.3V
R58 X_3K
(13) SPMEM_EN#
High, SIDE PORT MEMORY DISABLE
Low, SIDE PORT MEMORY ENABLE
B B
A A
Micro Star Restricted Secret
Title Rev
13.RS480-STRAPS 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, April 19, 2005
Taipei Hsien, Taiwan Sheet
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http://www.msi.com.tw 15 of 41
5 4 3 2 1
5 4 3 2 1
+3.3V
CLK_VDD
L13 30S/0805 +3.3V
CLK_VDDA L14 30S/0805
EC1 C199 C200 C201 C202 C203 C204 C206
104P 104P 104P 104P 104P 104P 475P/0805
X_ELS10/16-B C207 EC2
104P X_ELS10/16-B
D D
1- PLACE ALL THE SERIES TERMINATION
CLK_VDD
RESISTORS AS CLOSE AS U300 AS POSSIBLE
U3
2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, GPPCLK/# AS DIFFERENT PAIR RULE
43 VDDCPU VDDA 39
3- PUT DECOUPLING CAPS CLOSE TO U300 14 VDDSRC3 GNDA 38
POWER PIN 21 VDDSRC2
32 45 CPUCLK_EXT_R R59 15
VDDSRC1 CPUCLK8T0 CPU_CLK (5)
35 44 CPUCLK#_EXT_R R60 15
+3.3V VDD_SRC0 CPUCLK8C0 CPU_CLK# (5)
51 VDD_PCI CPUCLK8T1 41
L44 80S/0805 3 40
VDD48 CPUCLK8C1
48 VDDHTT
C205 56 12
VDDREF SRCCLKT7
SRCCLKC7 13
105P 5 16
GND1 SRCCLKT6
55 GND2 SRCCLKC6 17
36 18 GPPCLK1_R R61 33 GPPCLK1 R62 49.9RST
GNDSRC0 SRCCLKT5 GPPCLK1#_R R63 33 GPPCLK1# R64 49.9RST
31 GNDSRC1 SRCCLKC5 19
26 22 GPPCLK0_R R65 33 GPPCLK0 R66 49.9RST
C208 GNDSRC2 SRCCLKT4 GPPCLK0#_R R67 33 GPPCLK0# R68 49.9RST
20 GNDSRC3 SRCCLKC4 23
18P SBSRCCLK_R R69 33 SBSRCCLK R70 49.9RST
Parallel Resonance Crystal 15
49
GNDSRC4 SRCCLKT3 24
25 SBSRCCLK#_R R71 33 SBSRCCLK# R72 49.9RST
Y1 GNDPCI SRCCLKC3 GFXCLK_R R73 33 GFXCLK R74 49.9RST
46 GNDHTT SRCCLKT2 27
2
YCRY14.31818H16P R77 42 28 GFXCLK#_R R75 33 GFXCLK# R76 49.9RST
X_1M GNDCPU SRCCLKC2 NBSRCCLK_R R78 33 NBSRCCLK R79 49.9RST
SRCCLKT1 30
C209 1 29 NBSRCCLK#_R R80 33 NBSRCCLK# R81 49.9RST
C 18P X1 SRCCLKC1 SBLINKCLK_R R82 33 SBLINKCLK R83 49.9RST C
34
1
R84 0 SRCCLKT0 SBLINKCLK#_R R85 33 SBLINKCLK# R86 49.9RST
2 X2 SRCCLKC0 33
6 50 CLK_VDD
NC SEL75#/100/PCICLK0
FOR ICS ONLY
(7,8,19,23,25,32,34) SMB_CLK 7 SCLK CLK FREQ
8 R89 R90 R91
(7,8,19,23,25,32,34) SMB_DATA SDATA 10K 10K 10K
R92 33 OSC14M_REFOUT 52 R598 10
(13) OSC14M REF2 SB_OSC_14M (19)
54 AC97_CLK_R R93 22
FS0/REF0 AC97_CLK (31)
37 53 SIO_CLK_R R94 33
Ioh = 5 * Iref IREF FS1/REF1 SIO_CLK (24)
FS2 9
C210 (2.32mA) R96
X_33P Voh = 0.71V @ 60 ohm 475RST
4 USBCLK_EXT_RR97 10
USB_48MHz USBCLK_EXT (19)
1% 47 HTREFCLK_R R98 33
HTTCLK0 HTREFCLK (13)
R99 R100 R101 C211 C212
R102 0 11 X_10K X_10K X_10K X_33P X_33P
R103 0 CLKREQB# R104
10 CLKREQA# 51.1RST
CY28RS480
USBCLK_EXT
B B
C628 GFXCLK
GFXCLK (23)
X_22P GFXCLK#
GFXCLK# (23)
OVERLAP COMMON PADS FOR DUAL-OP NBSRCCLK
NBSRCCLK (13)
RESISTORS NBSRCCLK#
NBSRCCLK# (13)
SBSRCCLK
EXT CLK FREQUENCY SELECT TABLE(MHZ) SBSRCCLK#
SBSRCCLK (18)
SBSRCCLK# (18)
FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT GPPCLK0
GPPCLK0 (23)
[2:1] GPPCLK0#
GPPCLK0# (23)
GPPCLK1
GPPCLK1 (32)
0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved GPPCLK1#
GPPCLK1# (32)
0 0 1 X 100.00 X/3 X/6 48.00 Reserved
0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved
SBLINKCLK
SBLINKCLK (13)
0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved SBLINKCLK#
SBLINKCLK# (13)
1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved
1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved
1 1 1 200.00 100.00 66.66 33.33 48.00 Normal HAMMER operation
A A
Micro Star Restricted Secret
Title Rev
14.EXTERNAL CLOCK GENERATOR 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 16 of 41
5 4 3 2 1
5 4 3 2 1
Video Connector 2.7K
+5V
close chip close VGA connector
2 1 5VDDCCL
+5V
4 3 5VDDCDA (13) R L33 X_0.082u L15 0.082uH
+3VR 6 5 DAC_SCL +3VR
+3VR
2
2
+5V 8 7 DAC_SDAT 2 1
+5V
2
2
R641 CP23 C213 C214
+3VR RN65 R105 3 C530 X_3.3P
220-1206
1
1
D1 X_3.3P 33P
1
C647
C 75RST BAV99
1
D Q2 Q3 D
104P
(13) DAC_SCL 5VDDCCL (13) DAC_SDAT 5VDDCDA
D30 (13) G L34 X_0.082u L16 0.082uH
5mA RLZ3.3V
2
2
NDS7002AS NDS7002AS +5V 1 2
A
2
2
CP24 C215 C216
R106 3 C531 X_3.3p/25V
1
1
D2 X_3.3P 33P
1
75RST BAV99
1
+5V
R107 10K C217 1 2 X_104P (13) B L35 X_0.082u L17 0.082uH
5
2
2
1 +5V 1 2
2
2
4 5V_HSYNC CP25 C218 C219
(13) HSYNC# HSYNC# 2 R109 3 C532 X_3.3p/25V
1
1
U4 D3 X_3.3P 33P
1
NC7SZ126M5 75RST BAV99
3
1
R110 X_0
1.1A-S C220
FS1 104P
+5V
JVGA1
17
+5V
C221 1 2 X_104P RN66 VGA_15 15 5
5
C 47 10 C
U40_1 1 5VDDCCL 2 1 VGA_14 14 4
4 5V_VSYNC 5VDDCDA 4 3 VGA_9 9
(13) VSYNC# VSYNC# 2 5V_HSYNC 6 5 VGA_13 13 3 VGA_B
U5 5V_VSYNC 8 7 8
3 NC7SZ126M5 VGA_12 12 2 VGA_G
7
11 1 VGA_R
1
3
5
7
R112 X_0 6
CN1
X_33P
16
2
4
6
8
VGA-D15-BL-B-SC
B B
A A
Micro Star Restricted Secret
Title Rev
17.VGA CON. 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 17 of 41
5 4 3 2 1
5 4 3 2 1
LENGTH OF (PCI_CLK9_R + PCI_CLK9_FB) SHOULD
MATCH THE AVERAGE OF THE OTHER SPCI_CLKS
R113
10K U6A RN67
PCI_CLK0_R 8P4R-22
32K_X1 PCIRST# AH8
SB400 SB PCICLK0 L4
L3 PCI_CLK1_R 1 2 PCI SLOT0
(13,24,29,34) PCIRST# A_RST# PCICLK1 PCI_CLK0 (25)
Part 1 of 4 L2 PCI_CLK2_R 3 4 PCI SLOT1
PCICLK2 PCI_CLK1 (25)
4
Y2 (16) SBSRCCLK L27 L1 PCI_CLK3_R 5 6 Gigabit Ethernet
PCIE_RCLKP PCICLK3 PCI_CLK3 (22,32)
1 2 32K_X2 (16) SBSRCCLK# M27 M4 PCI_CLK4_R 7 8
PCIE_RCLKN PCICLK4 PCI_CLK4 (22,36) TMP CONN.
M3 PCI_CLK5_R RN68 1 2
PCICLK5 PCI_CLK5 (22,26) LPC ROM
YCRY32.768C C222 104P A_RX0P_C M30 M2 PCI_CLK6_R 8P4R-22 3 4
(12) A_RX0P PCI_CLK6 (22,24)
3
PCIE_TX0P PCICLK6
PCI CLKS
R114 C223 104P A_RX0N_C N30 M1 PCI_CLK7_R 5 6 LPC Super I/O
D (12) A_RX0N PCIE_TX0N PCICLK7 PCI_CLK7 (22) D
20M R115 20M C224 104P A_RX1P_C K30 N4 PCI_CLK8_R 7 8
(12) A_RX1P PCIE_TX1P PCICLK8 PCI_CLK8 (22)
C225 104P A_RX1N_C L30 N3 PCI_CLK9_R R116 22
(12) A_RX1N PCIE_TX1N PCICLK9
H30 N2 PCI_CLK9_FB C226 X_100P
C227 C228 PCIE_TX2P PCICLK_FB
J30 PCIE_TX2N
F30 PCIRST#_SEC
12P 12P PCIE_TX3P PCIRST# AJ7 PCI_AD0
TP62 PCI_AD[31..0] (22,25)
PCI_CLK2_R R637 22 PCI_CLK2
G30 PCIE_TX3N AD0/ROMA18 W3 PCI_CLK2 (22)
PCI_AD1
AD1/ROMA17 Y2 PCI_AD2
(12) A_TX0P M29 PCIE_RX0P AD2/ROMA16 W4
N29 PCI_AD3
(12) A_TX0N PCIE_RX0N AD3/ROMA15 Y3 PCI_AD4
(12) A_TX1P M28 PCIE_RX1P AD4/ROMA14 V1
(12) A_TX1N N28 Y4 PCI_AD5
PCIE_RX1N AD5/ROMA13 PCI_AD6
J29 PCIE_RX2P AD6/ROMA12 V2
+1.8V_S0 PCIE_PVDD K29 PCI_AD7
PCIE_RX2N AD7/ROMA11 W2 PCI_AD8
J28 PCIE_RX3P AD8/ROMA9 AA4
K28 PCI_AD9
L18 30S/0805 PCIE_RX3N AD9/ROMA8 V4 PCI_AD10
R117 150RST AD10/ROMA7 AA3 PCI_AD11
G27 PCIE_CALRP AD11/ROMA6 U1
R118 150RST H27 AA2 PCI_AD12
PCIE_CALRN AD12/ROMA5
PCI EXPRESS INTERFACE
C230 C231 PCI_AD13
105P/B 105P/B R119 4.12KST AD13/ROMA4 U2 PCI_AD14
G28 PCIE_CALI AD14/ROMA3 AA1 PCI_AD15
AD15/ROMA2 U3 PCI_AD16
PCIE_PVDD R30 PCIE_PVDD AD16/ROMD0 T4
AC1 PCI_AD17
AD17/ROMD1 PCI_AD18
F26 PCIE_VDDR_1 AD18/ROMD2 R2
R29 AD4 PCI_AD19
PCIE_VDDR_2 AD19/ROMD3 PCI_AD20
G26 PCIE_VDDR_3 AD20/ROMD4 R3
P26 PCI_AD21
PCIE_VDDR_4 AD21/ROMD5 AD3 PCI_AD22
K26 PCIE_VDDR_5 AD22/ROMD6 R4
+1.8V_S0 L26 PCI_AD23
PCIE_VDDR_6 AD23/ROMD7 AD2 PCI_AD24
P28 PCIE_VDDR_7 AD24 P2
C N26 AE3 PCI_AD25 C
L19 30S/0805 PCIE_VDDR PCIE_VDDR_8 AD25 PCI_AD26
P27 PCIE_VDDR_9 AD26 P3 PCI_AD27
C235 C236 AD27 AE2 PCI_AD28
H28 PCIE_VSS_1 AD28 P4
C642 C233 C234 104P/B 104P/B F29 PCI_AD29
104P 105P/B 105P/B PCIE_VSS_2 AD29 AF2 PCI_AD30
H29 PCIE_VSS_3 AD30 N1
H26 AF1 PCI_AD31
PCIE_VSS_4 AD31 PCI_CBE#[3..0] (25)
PCI_CBE#0
PCI INTERFACE
F27 PCIE_VSS_5 CBE0#/ROMA10 V3
G29 PCI_CBE#1
PCIE_VSS_6 CBE1#/ROMA1 AB4 PCI_CBE#2
L29 PCIE_VSS_7 CBE2#/ROMWE# AC2
J26 PCI_CBE#3
PCIE_VSS_8 CBE3# AE4
L28 PCIE_VSS_9 FRAME# T3 PCI_FRAME# (25)
J27 AC4 +3.3V
PCIE_VSS_10 DEVSEL#/ROMA0 PCI_DEVSEL# (25)
N27 PCIE_VSS_11 IRDY# AC3 PCI_IRDY# (25)
M26 PCIE_VSS_12 TRDY#/ROMOE# T2 PCI_TRDY# (25)
K27 PCIE_VSS_13 PAR/ROMA19 U4 PCI_PAR (25)
P29 PCIE_VSS_14 STOP# T1 PCI_STOP# (25)
P30 PCIE_VSS_15 PERR# AB2 PCI_PERR# (25)
SERR# AB3 PCI_SERR# (25)
BMREQ# R588 10K
AJ8 CPU_STP#/DPSLP# REQ0# AF4 PCI_REQ#0 (25)
AK7 PCI_CLKRUN# R589 10K
PCI_STP# REQ1# AF3 PCI_REQ#1 (25)
LDRQ#0_SB R590 10K
(25) PCI_INTA# AG5 INTA# REQ2# AG2 PCI_REQ#2 (25)
AH5 LDRQ#1_SB R591 10K
(25) PCI_INTB# INTB# REQ3#/PDMA_REQ0# AG3 PCI_REQ#3 (25)
(25) PCI_INTC# AJ5 INTC# REQ4#/PLL_BP33/PDMA_REQ1# AH1 PCI_REQ#4 (25)
(25) PCI_INTD# AH6 INTD# REQ5#/GPIO13 AH2 PCI_REQ#5 (22,25)
INTE# AJ6 INTG#
(25) PCI_INTE#
INTF# INTE#/GPIO33 REQ6#/GPIO31 AH3 PCI_REQ#6 (25)
INTF#
8 7
(25) PCI_INTF# AK6 INTF#/GPIO34 GNT0# AJ2 PCI_GNT#0 (25) 6 5
INTG# AG7 INTH#
(25) PCI_INTG#
INTH# INTG#/GPIO35 GNT1# AK2 PCI_GNT#1 (25)
INTE#
4 3
(25) PCI_INTH# AH7 INTH#/GPIO36 GNT2# AJ3 PCI_GNT#2 (25) 2 1
RN120 8P4R-8.2K
B GNT3#/PLL_BP66/PDMA_GNT0# AK3 PCI_GNT#3 (25)
RN71 B
GNT4#/PLL_BP50/PDMA_GNT1# AG4 PCI_GNT#4 (25)
8P4R-100K
GNT5#/GPIO14 AH4 PCI_GNT#5 (22,25) LAD0
32K_X1 GNT6#/GPIO32 AJ4 PCI_CLKRUN# PCI_GNT#6 (25) LAD1
7 8
B2 X1 CLKRUN# AG1 5 6
LAD2
LOCK# AB1 PCI_LOCK# (25)
LAD3
3 4
1 2
XTAL
32K_X2 B1
VCCA_1V2 VCCA_1V2 X2
AG25 LAD0 +3V_Dual
LAD0 LAD0 (24,26,32,36)
AH25 LAD1
LAD1 LAD1 (24,26,32,36)
CPU_PG_T C29 AJ25 LAD2
TP42 CPU_PG LAD2 LAD2 (24,26,32,36)
R120 R643 INTR_T A28 AH24 LAD3
TP43 INTR/LINT0 LAD3 LAD3 (24,26,32,36)
X_1K 62 C28 AG24
LPC
NMI/LINT1 LFRAME# LFRAME# (24,26,32,36)
INIT#_T B29 AH26 LDRQ#0_SB R121 0 R659
TP44 INIT# LDRQ0# LDRQ#0 (24)
D29 SMI# LDRQ1# AG26 LDRQ#1_SB R122 0
LDRQ#1 (36) 1K
(5,13) LDTSTOP# E4 SW2
SLP#/LDT_STP#
CPU
B30 IGNNE# SERIRQ AK27 SERIRQ (24,32,36)
1
F28 D4
A20M# BAT54C
E28 FERR#
E29 A 3 1K R587 SIO_VBAT
(13) ALLOW_LDTSTOP STPCLK#/ALLOW_LDTSTP
(5) LDT_PG D25 LDT_PG/SSMUXSEL/GPIO0 RTCCLK C2 RTC_CLK (22,24,36) B
E27 DPRSLPVR RTC_IRQ#/ACPWR_STRAP F3 AUTO_ON# (22)
(13) BMREQ# D27 C
2
BMREQ#
RTC
D28 A2 VBAT
(5,37) LDT_RST# LDT_RST# VBAT
A1 PUSH-1B-OFF-D
RTC_GND
1
R125 VBAT
C242 C243 1K
SB400 104P 105P C241
R126 105P/X7R/10V
BAT1 1K
A BAT-2P_SO41 A
2
Micro Star Restricted Secret
Note: Overlap common pads where Title Rev
possible for dual-op resistors. 18.SB400-PCI/CPU/LPC/RTC 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 18 of 41
5 4 3 2 1
5 4 3 2 1
+3V_Dual +3V_Dual +3.3V
R127 R128 R129 R513 R514 R515 R638 R642 R516 R517 R518 R519 R520 R521 R522
NOTE: ONLY USE FUNDAMENTAL MODE CRYSTAL
X_10K 10K 8.2K 4.7K 1K 4.7K 4.7K X_4.7K 4.7K 4.7K 2.2K 2.2K 4.7K 4.7K 4.7K
RI#
AC_RST# WAKE_UP#
SB_PWBTIN# BLINK
TALERT#
SLP_S3# SMB_CLK
SLP_S5# SMB_DATA
D PCI_PME# ROM_CS# D
S3_STATE AGP_BUSY#
DDC1_SDA AGP_STP#
1
DDC1_SCL
C626
CHI# U6D X_10p
GPIO3
2
AC_SDATA_IN2 Part 4 of 4 SB_48M_X1 R634 0
AC_SDATA_IN1 TALERT# C6
SB400 SB 48M_X1/USBCLK A15
B15
USBCLK_EXT (16)
TALERT#/TEMP_ALERT#/GPIO10 48M_X2 TP45
AC_SDATA_IN0 BLINK D5 C15 USB_RCOMP R134 12.4KST
AC_BITCLK BLINK/GPM6# USB_RCOMP
(24,25,32,37) PCI_PME# C4 PCI_PME#/GEVENT4# USB_VREFOUT D16 TP17
SB_TEST0 RI# D3 C16
(32) RI# RI#/EXTEVNT0# USB_ATEST1 TP18
SB_TEST1 B4 D15
(24,34) SLP_S3# SLP_S3# USB_ATEST0 TP19
R523 R524 R525 R526 R136 R137 R527 R528 R529 R530 E3 B8
(24,34) SLP_S5# SLP_S5# USB_OC0#/GPM0# USB_OCP#1 (27)
B3 C8
ACPI / WAKE UP EVENTS
(24) SB_PWBTIN# PWR_BTN# USB_OC1#/GPM1#
(24,35,36) SB_PWRGD C3 PWR_GOOD USB_OC2#/FANOUT1/GPM2# C7
10K 10K 10K 10K 10K 8.2K 10K 10K 10K 10K R660 0 D4 B7
(13) SUS_STAT# SB_TEST1 SUS_STAT# USB_OC3#/GPM3#
F2 TEST1 USB_OC4#/GPM4# B6
SB_TEST0 E2 A6
TEST0 USB_OC5#/GPM5# USB_OCP#5 (27)
(24) KA20M#_SB AJ26 GA20IN USB_OC6#/FAN_ALERT#/GEVENT6# B5
(24) KRST#_SB AJ27 KBRST# USB_OC7#/CASE_ALERT#/GEVENT7# A5 USB_OCP#7 (28)
(5,34) THERMTRIP# D6 SMBALERT#/THRMTRIP#/GEVENT2#
LPC_PME# C5 A11
(24) LPC_PME# LPC_PME#/GEVENT3# USB_HSDP7+ USBP7 (28)
LPC_SMI# A25 B11
(24) LPC_SMI# LPC_SMI#/EXTEVNT1# USB_HSDM7- USBN7 (28)
S3_STATE D8
TP59 VOLT_ALERT#/S3_STATE/GEVENT5#
(36) FP_RST# D7 SYS_RESET#/GPM7# USB_HSDP6+ A10 USBP6 (28)
WAKE_UP# D2 B10
PCIE WAKE UP CONNECT TO 397 WAKE#/GEVENT8# USB_HSDM6- USBN6 (28)
SB_PWBTIN#
USB INTERFACE
EVENT6
RSMRST#_G D1 A14
RSMRST# USB_HSDP5+ USBP5 (27)
USB_HSDM5- B14 USBN5 (27)
R599 X_0 A23
C (13) SB_OSC_INT 14M_X1/OSC C
C650 A13
USB_HSDP4+ USBP4 (27)
104P R618 0 B23 B13
CLK / RST
(16) SB_OSC_14M 14M_X2 USB_HSDM4- USBN4 (27)
TP46 AK24 SIO_CLK USB_HSDP3+ A18 USBP3 (27)
USB_HSDM3- B18 USBN3 (27)
ROM_CS# B25
CHI# ROM_CS#/GPIO1
C25 GHI#/GPIO6 USB_HSDP2+ A17 USBP2 (27)
C23 VGATE/GPIO7 USB_HSDM2- B17 USBN2 (27)
AGP_STP# D24
AGP_BUSY# AGP_STP#/GPIO4
D23 AGP_BUSY#/GPIO5 USB_HSDP1+ A21 USBP1 (27)
SB_PWRGD IS 50ms GPIO3 A27 B21
FANOUT0/GPIO3 USB_HSDM1- USBN1 (27)
(31) SPKR C24 SPKR/GPIO2
AFTER NB_PWRGD A26 A20
GPIO
(7,8,16,23,25,32,34) SMB_CLK SCL0/GPOC0# USB_HSDP0+ USBP0 (27)
(7,8,16,23,25,32,34) SMB_DATA B26 SDA0/GPOC1# USB_HSDM0- B20 USBN0 (27)
DDC1_SCL B27
DDC1_SDA DDC1_SCL/GPIO9 AVDD_USB1
C26
+3V_Dual C27
DDC1_SDA/GPIO8
DDC2_SCL/GPIO11 AVDDTX_0 C21 200mA
D26 C18
R631 10K DDC2_SDA/GPIO12 AVDDTX_1
AVDDTX_2 D13 +3V_Dual rating
5
D10 AVDD_USB2 AVDD_USB1
AVDDTX_3
1 AVDDRX_0 D20
4 RSMRST#_G TP20 J2 D17 L20 X_30S/0805
TP21 NC1 AVDDRX_1
(24,34) RSMRST# 2 K3 NC4 AVDDRX_2 C14
(NOT USED)
U52 TP22 J3 C11 2 1 C248
NC7SZ126M5 TP23 NC3 AVDDRX_3 +3.3V_AVDDC C249 C250
K2
3
NC2 CP16 X_106P/1206 105P/B 104P/B
AVDDC A16
AVSSC B16
R632 X_0 A9
B AC_BITCLK_R AVSS_USB_1 B
(31) AC_BITCLK G1 AC_BITCLK AVSS_USB_2 A12
R143 33 AC_DATA_OUT_R G2 A19 AVDD_USB2
(22,31) AC_SDATA_OUT AC_SDATA_IN0 AC_SDOUT AVSS_USB_3
(31) AC_SDATA_IN0 H4 AC_SDIN0 AVSS_USB_4 A22
AC_SDATA_IN1 G3 B9 L21 X_30S/0805
AC_SDATA_IN2 AC_SDIN1 AVSS_USB_5
G4 AC_SDIN2 AVSS_USB_6 B12
R144 33 AC_SYNC_R H1 B19 2 1 C255
AC97
USB PWR
(31) AC_SYNC AC_SYNC AVSS_USB_7 C256 C257
(31) AC_RST# H3 AC_RST# AVSS_USB_8 B22
H2 C9 CP17 X_106P/1206 105P/B 104P/B
(22) SPDIF_OUT SPDIF_OUT AVSS_USB_9
AVSS_USB_10 C10
C12
R144 CLOSE TO AC97 AVSS_USB_11
AVSS_USB_12 C13
AVSS_USB_13 C17
AVSS_USB_14 C19
AVSS_USB_15 C20
C22 +3.3V_AVDDC
AVSS_USB_16
AVSS_USB_17 D9
D11 L22 30S/0805
AVSS_USB_18
AVSS_USB_19 D12
AVSS_USB_20 D14
D18 C636 C637 C263 C264
AVSS_USB_21 104P/B 104P/B 105P 104P
AVSS_USB_22 D19
AVSS_USB_23 D21
AVSS_USB_24 D22
A A
Micro Star Restricted Secret
Title Rev
19.SB400-ACPI/GPIO/AC97/USB 130
Document Number MS-7050
SB400
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
www.kythuatvitinh.com
http://www.msi.com.tw 19 of 41
5 4 3 2 1
5 4 3 2 1
D D
SATA
GND 1
HT+ 2
3 PLACE SATA AC
HT-
4 COUPLING CAPS
GND
HR- 5 CLOSE TO SB400
HR+ 6
7 U6B
GND
SATA_TX0+_C C265 103P SATA_TX0+
SATA1
SATA_TX0-_C C266 103P SATA_TX0-
AK22
AJ22
SATA_TX0+ SB400 SB AD30
SATA_TX0- PIDE_IORDY PDIORDY# (29)
Part 2 of 4 PIDE_IRQ AE28 SIRQI (29) PDA[2..0] (29)
SATA SATA_RX0-_C C267 103P SATA_RX0- AK21 AD27 PDA0
SATA_RX0+_C C268 103P SATA_RX0+ SATA_RX0- PIDE_A0 PDA1
AJ21 SATA_RX0+ PIDE_A1 AC27
1 AD28 PDA2
GND SATA_TX1+_C C269 103P SATA_TX1+ PIDE_A2
HT+ 2 AK19 SATA_TX1+ PIDE_DACK# AD29 PDACK# (22,29)
3 SATA_TX1-_C C270 103P SATA_TX1- AJ19 AE27
HT- SATA_TX1- PIDE_DRQ PDREQ (29)
GND 4 PIDE_IOR# AE30 PDIOR# (29)
5 SATA_RX1-_C C271 103P SATA_RX1- AK18 AE29
HR- SATA_RX1- PIDE_IOW# PDIOW# (29)
6 SATA_RX1+_C C272 103P SATA_RX1+ AJ18 AC28
HR+ SATA_RX1+ PIDE_CS1# PDCS1# (29)
GND 7 PIDE_CS3# AC29 PDCS3# (29)
AK14 SATA_TX2+ PDD[15..0] (29)
PDD0
PRIMARY ATA 66/100
SATA2 AJ14 SATA_TX2- PIDE_D0 AF29
AF27 PDD1
PIDE_D1
SERIAL ATA
AK13 AG29 PDD2
SATA_RX2- PIDE_D2 PDD3
AJ13 SATA_RX2+ PIDE_D3 AH30
AH28 PDD4
PIDE_D4 PDD5
AK11 SATA_TX3+ PIDE_D5 AK29
C AJ11 AK28 PDD6 C
SATA_TX3- PIDE_D6 PDD7
PIDE_D7 AH27
AK10 AG27 PDD8
SATA_RX3- PIDE_D8 PDD9
AJ10 SATA_RX3+ PIDE_D9 AJ28
AJ29 PDD10
1KST R145 SATA_CAL PIDE_D10 PDD11
AJ15 SATA_CAL PIDE_D11 AH29
AG28 PDD12
104P C273 SATA_X1 PIDE_D12 PDD13
AJ16 SATA_X1 PIDE_D13 AG30
AF30 PDD14
SATA_X2 PIDE_D14 PDD15
AK16 SATA_X2 PIDE_D15 AF28
SATAACT# AK8 V29
(36) SATAACT# SATA_ACT# SIDE_IORDY
SIDE_IRQ T27
PLLVDD_ATA AH15 PLLVDD_SATA SIDE_A0 T28
SIDE_A1 U29
XTLVDD_ATA AH16 XTLVDD_SATA SIDE_A2 T29
SIDE_DACK# V30
+1.8V_ATA AG10 AVDD_SATA_1 SIDE_DRQ U28
AG14 AVDD_SATA_2 SIDE_IOR# W29
AH12 AVDD_SATA_3 SIDE_IOW# W30
AG12 AVDD_SATA_4 SIDE_CS1# R27
AG18 AVDD_SATA_5 SIDE_CS3# R28
AG21 AVDD_SATA_6
AH18 AVDD_SATA_7 SIDE_D0/GPIO15 V28
AG20 AVDD_SATA_8 SIDE_D1/GPIO16 W28
SECONDARY ATA 66/100
SIDE_D2/GPIO17 Y30
AG9 AVSSP_SATA_1 SIDE_D3/GPIO18 AA30
AF10 AVSSP_SATA_2 SIDE_D4/GPIO19 Y28
AF11 AVSSP_SATA_3 SIDE_D5/GPIO20 AA28
AF12 AVSSP_SATA_4 SIDE_D6/GPIO21 AB28
B AF13 AB27 B
SERIAL ATA POWER
AVSSP_SATA_5 SIDE_D7/GPIO22
AF14 AVSSP_SATA_6 SIDE_D8/GPIO23 AB29
XTLVDD_ATA +1.8V_S0 PLLVDD_ATA AF15 AA27
AVSSP_SATA_7 SIDE_D9/GPIO24
AF16 AVSSP_SATA_8 SIDE_D10/GPIO25 Y27
L23 80S/0805/B L24 80S/0805/B AF17 AA29
AVSSP_SATA_9 SIDE_D11/GPIO26
AF18 AVSSP_SATA_10 SIDE_D12/GPIO27 W27
AF19 AVSSP_SATA_11 SIDE_D13/GPIO28 Y29
C274 C633 C276 C277 C634 AF20 V27
105P/B 475P/0805/B 105P/B 104P/B 475P/0805/B AVSSP_SATA_12 SIDE_D14/GPIO29
AF21 AVSSP_SATA_13 SIDE_D15/GPIO30 U27
AF22 AVSSP_SATA_14
AH9 AVSSP_SATA_15
AG11 AVSSP_SATA_16 AVSST_SATA_1 AG13
AG15 AVSSP_SATA_17 AVSST_SATA_2 AH22
+1.8V_S0 AG17 AK12
+1.8V_ATA AVSSP_SATA_18 AVSST_SATA_3
AG19 AVSSP_SATA_19 AVSST_SATA_4 AH11
L25 80S/0805/B AG22 AJ17
AVSSP_SATA_20 AVSST_SATA_5
AG23 AVSSP_SATA_21 AVSST_SATA_6 AH14
C278 C279 C280 C281 AF9 AH19
106P/1206 104P/B 104P/B 104P/B C635 AVSSP_SATA_22 AVSST_SATA_7
AH17 AVSSP_SATA_23 AVSST_SATA_8 AJ20
475P/0805/B AH23 AH21
AVSSP_SATA_24 AVSST_SATA_9
AH13 AVSSP_SATA_25 AVSST_SATA_10 AJ9
AH20 AVSSP_SATA_26 AVSST_SATA_11 AG16
AK9 AVSSP_SATA_27 AVSST_SATA_12 AK15
AJ12 AVSSP_SATA_28 AVSST_SATA_13 AK20
AK17 AVSSP_SATA_29
AK23 AVSSP_SATA_30
AH10 AVSSP_SATA_31
AJ23 AVSSP_SATA_32
A A
SATA_X1 C282 27P
1
SATA_X2
www.kythuatvitinh.com
R146 Y5 Micro Star Restricted Secret
10M YCRY25H18PS
Title Rev
2
20.SB400-SATA/IDE
C283 27P 130
Document Number MS-7050
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Change C4176,C4177 to 0R Res if XTAL not used No. 69, Li-De St, Jung-He City, Wednesday, July 06, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 20 of 41
5 4 SB400 3 2 1
