Mainboard Foxconn Model 741M01C
Mainboard Foxconn Model 741M01C
5 4 3 2 1
REVISIONS
REV DESCRIPTION DATE APPROVED
A1 FIRST RELEASE 06/07/04
D D
Topology Page 1.
Page 2.
Topology, Index
Reset Map
Page 3. Clock Distribution
Page 4. Power Delivery Map
Page 5. K7 - 1
Page 6. K7 - 2
K7 Page 7. Power VCCP
Page 5,6 Page 8. 741-1 Host & AGP
Page 9. 741-2 DDR
Page 10. 741-3 MuTIOL Link
Page 11. 741-4 Power
Host Bus
Page 12. 963-1 PCI/IDE/MuTIOL 1G
Page 13. 963-2 LPC/MII/CPU/GPIO
Page 14. 963-3 USB
Page 15. 963-4 Power
C
AGP BUS DDR SDRAM DIMM1 Page 16. CLK Generator
C
AGP SLOT
Page 18 Page 17. DDR Clock Buff
SiS741 DIMM2 Page 18. AGP
Page 8,9,10,11 Page 20,22
Page 19. VGA Connector
Page 20. DIMM1 & DIMM2
PCI Slot 1 Page 21. Blank
MuTIOL 1G Page 22. DDR Termination
Page 23. PCI 1&2
LAN PHY
PCI Slot 2 Page 24. PCI 3
Page 34,26
Page 25. IDE
PCI Slot 3 Page 26. USB, LAN Port
Page 23,24
Page 27. ITE8705
AC'97 Page 28. Keyboard Mouse
Audio Codec Page 29. COM/PRT Port
IDE 1
SiS963 Page 32,33
Page 30. BIOS/FLOPPY
Page 31. FAN
PS/2 Page 32. AC97 CODEC
IDE 2 Keyboard Page 12,13,14,15
B
Page 25 /Mouse Page 28
Page 33. AC97 I/O B
Back Panel Front Panel Page 34. LAN PHY
LPC Bus USB 0 USB 4 Page 35. Power BTN/RTC Batt
USB 5 Page 36. SB3V/SB1.8V/AUX_IVDD
USB 1 Page 26 Page 37. DDR2.5V/DDRVTT
Page 38. ATX Power
FAN 1 USB 2 Page 39. IVDD & AUX_IVDD
FAN CONTROL
FAN 2 Page 31
VOLTAGE MONITOR USB 3 Page 40. Change List
Page 26
LPC Super I/O TEMPERATURE MONITOR
ISA Bus Page 27
ISA ROM 30
Page
IR PARALLEL SERIAL FLOPPY
Page 27 Page 29 Page 29 Page 30
A A
FOXCONN PCEG
Title
Topology, Index
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 1 of 40
5 4 3 2 1
5 4 3 2 1
VCCP VCCP K7
VRD10/VRM9.X
VRMPWRGD
D D
CPUPWRGD
&
PWOK
NBPWRGD
ATX
Power SiS741
PSON_
C C
AGP 8X SLOT
SiS963
SBPWRGD PCI Slot 1
PCI Slot 2
PCI Slot 3
PCIRST_
Front Panel
PSON_
IDE CONN 1
B RSTSW_ SIORST_ B
IDE CONN 2
PWRBTN_
PWRBTN_
SIORST_ SIORST_
Super IO Media
Interface
A A
FOXCONN PCEG
Title
Reset Map
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 2 of 40
5 4 3 2 1
14.318MHz
CPU
CPUCLK0 100/133/200 MHz
D D
100/133/200 MHz
CPUCLK1
66 MHz AGP 8x
DDR CLOCK BUFFER
AGPCLK1
133 MHz
SiS741
DIMM 1-2
ZCLK0
66 MHz
FWDSDCLK0 DDRCLK
AGPCLK0
CLOCK GENERATOR
33 MHz
96XPCLK
133 MHz
ZCLK1
C
48 MHz C
UCLK48M
12 MHz
TXCLK
REFCLK
RXCLK LAN PHY
33 MHz
PCI Slot 1-3
SiS963
PCICLK1-3
AUDIO_CLK
32.768KHz
AC'97
24.576MHz/NC
48 MHz
B SIO48M Super I/O B
A A
FOXCONN PCEG
Title
Clock Distribution
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 3 of 40
5 4 3 2 1
5 4 3 2 1
ATX SPS
5 3 + -
V 5 . 1 1
S V 3 2 2
B V V V
D Socket A 462 D
+5V
> VRD 10 VCCP
> VCCP
1.1V~1.85V 41.4A
SIS963L
SIS741
SB1.8V
> VCC3
96mA
VCC1.8V
488mA
VCC3
>
VCC3
>
VCC3:
3.3V
VCC1.8V
1.8V
SB3V
> SB3V
275mA
SB1.8V
27mA
145mA 290mA VCC1.8V
>
SB3V
> AUX_IVDD
> VCCP
>
Linear
Power Regulator SB3V VDDQ: RTCVDD VCCP
AGP 3uA 15mA
26mA 1.5V
SB3V
> OR
SB5V
AMS1117
SB3V
> VCC2.5_MEM SB1.8V
3 VOLTS
BATTERY >
VCC_RTC
>
2.5V 1.8V
VCC3
Linear
Power Regulator
VCC1.8V
> 463mA 10mA
CLK_GEN
IVDD
1.9V
VCCP
1.5V
VCC3
> 3.3V
300mA
C
VCC3
Linear
Power Regulator
IVDD
> 2.614A 101mA
C
AUX_IVDD
1.9V
SB5V
> SUPER I/O
VCC3 VDDQ 1.5V
> 501.3mA
5V_SYS
> SB5V
SB3V
> 5V
Linear
Power Regulator SB3V
VCC3
>
PCI PER SLOT:
VCC5
> 3.3V 7.6A
VCC5
>
+12V
>
5V 5.0A
12V 0.5A
VCC3
>
OR
> FWH
-12V
> -12V 0.1A
3.3Vaux
SB3V
> 0.375A
LAN PHY
VCC5
> USB
SB3V
> 5V 3A
SB5V
> PS2 KB/MS
5V
B VDDQ 1.5V
> AGP +12V LM7805 VCC5A
>
B
+12V
> VCC5
>
OR
> AC' 97 AUDIO CODEC
VCC3
> VCC3
> A5V 70mA
3.3V 10mA
VCC5
>
SB3V
>
DDR 2 DIMMS:
VCC3 VCC2.5_MEM
>
Linear
Power Regulator
2.6V +/-100mv
6.00A
DDR VTT
VCC2.5_MEM
> RT9173 DDR_VTT_STR
> 1.3V
2A
A A
FOXCONN PCEG
Title
Power Delivery Map
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 4 of 40
5 4 3 2 1
8 7 6 5 4 3 2 1
Near socket-A
VCCP VCCP Push-pull compensation circuit
AMD K7 CPU 1 OF 2 COREFB R39 49.9 VCCP VCCP
COREFBJ R108 49.9
8 SDATA-[63:0] R105 R106
60.4 60.4 R120 R109
CN1A VCC3 +/-1% +/-1% 100 100
SDATA-0 AA35 AE1 A20MJ VCCP
SDATA0 A20M A20MJ 13
SDATA-1 W37 AG1 FERR Near socket-A
SDATA-2 SDATA1 FERR INITJ R111 +/-1% CLKOUTJ CLKOUT
W35 SDATA2 INIT AJ3 INITJ 13
SDATA-3 Y35 AL1 INTR R121 R99 301
SDATA3 INTR INTR 13
SDATA-4 U35 AJ1 IGNNEJ 680 510
SDATA4 IGNNE IGNNEJ 13
SDATA-5 U33 AN3 NMI CPUCK BC29 50V, X7R, +/-10% R119 R118
SDATA5 NMI NMI 13 CPUCLK 16
**
D D
SDATA-6 S37 AG3 CPURSTJ 680pF C0603 100 100
SDATA6 RESET CPURSTJ 8
SDATA-7 S33 AN5 SMIJ CPUCKJ BC30 50V, X7R, +/-10%
SDATA7 SMI SMIJ 13 R102 CPUCLKJ 16
SDATA-8 AA33 AC1 STPCLKJ 680pF C0603
SDATA8 STPCLK STPCLKJ 13
SDATA-9 AE37
SDATA-10 SDATA9 BC32 VCCP
AC33 SDATA10 PWROK AE3 PWRGD_CPU 10,38 Trace lengths of CLKOUT and
SDATA-11
SDATA-12
AC37
Y37
SDATA11
SDATA12
47pF * NP
301
FERRJ
FERRJ 13 VREF_SYS is set at 50%
-CLKOUT are between 2" and
SDATA-13 AA37 N1 3"
SDATA13 PICCLK PICCLKCPU 16 of VCC_CORE to CPU
C
SDATA-14 AC35 N3 R214
SDATA14 PICD0/BYPASSCLK APICD0 13
SDATA-15 S35 N5 FERR B Q11 100
SDATA15 PICD1/BYPASSCLK APICD1 13 MMBT3904
SDATA-16 Q37
SDATA-17 SDATA16 COREFBJ VCCP
Q35 SDATA17 COREFB- AG13
E
SDATA-18 N37 AG11 VREF_SYS
SDATA18 COREFB+ COREFB 7
SDATA-19 J33 SDATA19
SDATA-20
SDATA-21
G33
G37
SDATA20
SDATA21
CLKIN
CLKIN
AN17
AL17
CPUCK
CPUCKJ
* * BC99 * BC100 R215
ZN R131 40.2
SDATA-22
SDATA-23
E37
G35
SDATA22
SDATA23 RSTCLK AN19
* BC31
BC28
10nF VCCP
10nF 0.1uF
C0603
100 ZP R128 56
SDATA-24 Q33 AL19 10nF NP
SDATA-25 SDATA24 RSTCLK NP NP
N33 SDATA25
SDATA-26 L33 AL21 CLKOUT R138 124
SDATA-27 SDATA26 K7CLKOUT CLKOUTJ R0603 +/-1% VCCP
N35 SDATA27 K7CLKOUT AN21
SDATA-28 L37
SDATA-29 SDATA28 VCC3 VCC3 VCC3
J37
SDATA-30
SDATA-31
A37
E35
SDATA29
SDATA30 ANALOG AJ13 CPURSTJ
INTR
*
1
3
2 RN11
4 680 R134
SDATA-32 SDATA31 VREFMODE IGNNEJ
E31 SDATA32 SYSVREFMODE AA5 5 6 1K
SDATA-33 E29 W5 VREF_SYS A20MJ 7 8 NP
SDATA-34 SDATA33 VREF_SYS R218 VREFMODE
A27
SDATA-35
SDATA-36
A25
E21
SDATA34
SDATA35 ZN AC5
AE5
ZN
ZP
SMIJ
INITJ
*
1
3
2 RN10
4 680
R217
330
330
R0603
R219
330 R112
SDATA-37 SDATA36 ZP FLUSHJ
C23 SDATA37 5 6 R0603 +/-5% R0603 270
SDATA-38 C27 AJ25 PLLBPJ NMI 7 8 NP
SDATA-39 SDATA38 PLLBYPASS PLLCK PICCLKCPU +/-5% APICD0 APICD1 +/-5%
A23 AN15
SDATA-40
SDATA-41
A35
C35
SDATA39
SDATA40
PLLBYPASSCLK
PLLBYPASSCLK AL15 PLLCKJ TMS+
TCK+
*
1
3
2 RN17
4 510
VREFMODE=Low=No voltage scaling
SDATA-42 SDATA41 PLLMON1 TRSTJ R232
C33 SDATA42 PLLMON1 AN13 5 6
SDATA-43 C31 AL13 PLLMON2 TDI+ 7 8 R230 1K R233
SDATA43 PLLMON2
C C
SDATA-44 A29 AC3 PLLTESTJ 1K R0603 1K
SDATA-45 SDATA44 PLLTEST
C29 SDATA45 R0603 +/-5% R0603
SDATA-46 E23 STPCLKJ R129 680
SDATA-47 SDATA46 SCANCLK1 PLLBPJ R123 680 +/-5% +/-5%
C25 SDATA47 SCANCLK1 S1
SDATA-48 E17 S5 SCANCLK2 PLLMON1 R113 56
SDATA-49 SDATA48 SCANCLK2 SINTVAL PLLMON2 R117 56
E13 SDATA49 SCANINTEVAL S3
SDATA-50 E11 Q5 SSHIFTEN DBREQJ R133 510
SDATA-51 SDATA50 SCANSHIFTEN PLLTESTJ R130 510 SDATAINCLK-[0..3]
C15 SDATA51 SDATAINCLK-[0..3] 8
SDATA-52 E9 AA1 SADDIN-0 R135 680
SDATA-53 SDATA52 DBRDY DBREQJ SADDIN-1 R115 680
A13 SDATA53 DBREQ AA3
SDATA-54 C9 AL3 FLUSHJ
SDATA-55 SDATA54 FLUSH
A9 SDATA55
SDATA-56 C21 Q1 TCK+ L17 L16
SDATA-57 SDATA56 TCK TDI+ SADDOUT-0 1K DAINCLK-0
A21 SDATA57 TDI U1 R229 1 2 1 2 SDATAINCLK-0
SDATA-58 E19 U5 SADDOUT-1 R216 1K L0603 4.7uH +/-10% C187 L0603 4.7uH +/-10%
SDATA58 TDO
SDATA-59
SDATA-60
C19
C17
SDATA59
SDATA60
TMS
TRST
Q3
U3
TMS+
TRSTJ
PICCLKCPU
DOVALJ
R231
R136
1K
270 * 2.7pF
50V, NPO, +/-0.25pF
SDATA-61 A11 FILVALJ R116 270 C0603
SDATA-62 SDATA61
A17
SDATA-63 A15
SDATA62
SDATA63 VID0 L1
L3
VID0
VID1
VID0
VID1
7
7
SCANCLK2
SINTVAL
*
1
3
2 RN16
4 270 L19 L18
VID1 VID2 SCANCLK1 DAINCLK-1
VID2 L5 VID2 7 5 6 1 2 1 2 SDATAINCLK-1
DAINCLK-0 W33 L7 VID3 SSHIFTEN 7 8 L0603 4.7uH +/-10% C193 L0603 4.7uH +/-10%
SDATAINCLK0 VID3 VID3 7
DAINCLK-1
DAINCLK-2
J35
E27
SDATAINCLK1
SDATAINCLK2
VID4 J7 VID4
VID4 7
FID[3:0] 10
* 2.7pF
50V, NPO, +/-0.25pF
DAINCLK-3 E15 CPURSTJ BC27 1nF C0603
SDATAINCLK3
*
W1 FID0 C0603
FID0 FID1 25V, NPO, +/-5%
8 SDATAINVAL- AN33 SDATAINVAL FID1 W3
Y1 FID2 L21 L20
SDATAOUTCLK-0 FID2 FID3 DAINCLK-2
8 SDATAOUTCLK-[0..3] AE35 SDATAOUTCLK0 FID3 Y3 1 2 1 2 SDATAINCLK-2
SDATAOUTCLK-1
C37 L0603 4.7uH +/-10% C199 L0603 4.7uH +/-10%
SDATAOUTCLK1
SDATAOUTCLK-2
A33
SDATAOUTCLK-3
C11
SDATAOUTCLK2
SDATAOUTCLK3 SCHECK0 U37
VCCP VCCP
* 2.7pF
50V, NPO, +/-0.25pF
Y33 C0603
DOVALJ SCHECK1
AL31 SDTATOUTVAL SCHECK2 L35
SCHECK3 E33
SADDIN-0 AJ29 E25 R125 R126 L23 L22
SADDIN-1 SADDIN0 SCHECK4 DAINCLK-3
AL29 SADDIN1 SCHECK5 A31 100 100 1 2 1 2 SDATAINCLK-3
B B
SADDIN-2 AG33 C13 L0603 4.7uH +/-10% C213 L0603 4.7uH +/-10%
8 SADDIN-[2..14] SADDIN2 SCHECK6
SADDIN-3
SADDIN-4
AJ37
AL35
SADDIN3
SADDIN4
SCHECK7 A19
PLLCK PLLCKJ * 2.7pF
50V, NPO, +/-0.25pF
SADDIN-5 AE33 J1 SADDOUT-0 C0603
SADDIN-6 SADDIN5 SADDOUT0 SADDOUT-1
AJ35 SADDIN6 SADDOUT1 J3
SADDIN-7 AG37 C7 SADDOUT-2 R124 R127
SADDIN7 SADDOUT2 SADDOUT-[2..14] 8
SADDIN-8 AL33 A7 SADDOUT-3 100 100
SADDIN-9 SADDIN8 SADDOUT3 SADDOUT-4 L15 L14
AN37 SADDIN9 SADDOUT4 E5
SADDIN-10 AL37 A5 SADDOUT-5 ADINCLK- 1 2 1 2 SADDINCLK-
SADDIN10 SADDOUT5 SADDINCLK- 8
SADDIN-11 AG35 E7 SADDOUT-6 L0603 4.7uH +/-10% C171 L0603 4.7uH +/-10%
SADDIN11 SADDOUT6
SADDIN-12
SADDIN-13
AN29
AN35
SADDIN12
SADDIN13
SADDOUT7
SADDOUT8
C1
C5
SADDOUT-7
SADDOUT-8 * 2.7pF
50V, NPO, +/-0.25pF
SADDIN-14 AN31 C3 SADDOUT-9 C0603
SADDIN14 SADDOUT9 SADDOUT-10
SADDOUT10 G1
ADINCLK- AJ33 E1 SADDOUT-11
SADDINCLK SADDOUT11 SADDOUT-12
SADDOUT12 A3
AJ21 G5 SADDOUT-13
8 CLKFWDRST CLKFWDRST SADDOUT13
AL23 G3 SADDOUT-14
8 CONNECT CONNECT SADDOUT14
8 PROCRDY AN23 PROCRDY
FILVALJ AJ31 E3
SFILLVAL SADDOUTCLK SADDOUTCLK- 8
CPU K7 Socket462
A A
FOXCONN PCEG
Title
K7 - 1
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 5 of 40
A
B
C
D
*
VCC3
K8
AA7
N7
H8
H6
AK8
AH6
Q7
G7
G9
AN7
AJ7
AJ9
AH8
AD8
AG9
AG7
AL7
K30
F8
AL9
Y7
H32
H30
H28
H10
AF8
AF6
G23
G15
G17
G25
AD30
AG27
AG17
AG29
AG15
F30
AF32
AF30
AF28
AF10
AM8
H14 H12
1uF
VSS1 VCC_CORE1
H18 H16
BC20
KEY
KEY
KEY
KEY
KEY
KEY
KEY
KEY
AMD
VSS2 VCC_CORE2
KEY8
KEY6
KEY4
H22 H20
3
KEY18
KEY16
KEY14
KEY12
KEY10
VSS3 VCC_CORE3
H26 VSS4 VCC_CORE4 H24
M30 VSS5 VCC_CORE5 M8
VCC_SRAM8
VCC_SRAM7
VCC_SRAM6
VCC_SRAM5
VCC_SRAM4
VCC_SRAM3
VCC_SRAM2
VCC_SRAM1
P8 P30
V_IN
VCC_SRAM31
VCC_SRAM30
VCC_SRAM29
VCC_SRAM28
VCC_SRAM27
VCC_SRAM26
VCC_SRAM25
VCC_SRAM24
VCC_SRAM23
VCC_SRAM22
VCC_SRAM21
VCC_SRAM20
VCC_SRAM19
VCC_SRAM17
VCC_SRAM16
VCC_SRAM14
VCC_SRAM13
VCC_SRAM11
VSS6 VCC_CORE6
R30 VSS7 VCC_CORE7 R8
8
1 GND T8 VSS8 VCC_CORE8 T30
V30 VSS9 VCC_CORE9 V8
U5 AME8800
X8 VSS10 VCC_CORE10 X30
Z30 Z8
V_OUT
VSS11 VCC_CORE11
AB8 VSS12 VCC_CORE12 AB30
AF12 AF14
2
VSS13 VCC_CORE13
AF16 VSS14 VCC_CORE14 AF18
AF20 VSS15 VCC_CORE15 AF22
2 1 AF24 VSS16 VCC_CORE16 AF26
AM36 VSS17 VCC_CORE17 AM34
FB1
AK32 VSS18 VCC_CORE18 AK36
10uF
AK28 AK34
BC26
2
2D5V_CPU
C0805
VSS19 VCC_CORE19
AK24 VSS20 VCC_CORE20 AK30
AK20 AK26
AMD K7 CPU 2 OF 2
VSS21 VCC_CORE21
AK16 AK22
*
VSS22 VCC_CORE22
AK12 AK18
1
0
VSS23 VCC_CORE23
AK4 VSS25 VCC_CORE24 AK14
10nF
AK2 AK10
BC25
VSS26 VCC_CORE25
AH36 AL5
*
VSS27 VCC_CORE26
AM32 VSS28 VCC_CORE27 AH26
AH34 VSS29 VCC_CORE28 AM30
R104
AH32 VSS30 VCC_CORE29 AH22
39pF
AH28 AH18
BC24
VSS31 VCC_CORE30
AH24 VSS32 VCC_CORE31 AH14
AH20 VSS33 VCC_CORE32 AH10
10
7
AH16 VSS34 VCC_CORE33 AH4
AH12 VSS35 VCC_CORE34 AH2
AF4 AF36
*
VSS37 VCC_CORE35
AF2 VSS38 VCC_CORE36 AF34
AD36 VSS39 VCC_CORE37 AD6
AD34 VSS40 VCC_CORE38 AM26
39pF
AD32 AD4
BC23
VSS41 VCC_CORE39
R101
AB6 VSS42 VCC_CORE40 AD2
AB4 VSS43 VCC_CORE41 AB36
AB2 VSS44 VCC_CORE42 AB34
Z36 VSS45 VCC_CORE43 AB32
10
Z34 VSS46 VCC_CORE44 Z6
Z32 VSS47 VCC_CORE45 Z4
X6 VSS48 VCC_CORE46 Z2
AM28 VSS49 VCC_CORE47 X36
X4 X34
*
VSS50 VCC_CORE48
X2 VSS51 VCC_CORE49 AM22
VCCP
V36 VSS52 VCC_CORE50 X32
V34 V6
39pF
VSS53 VCC_CORE51
V32 V4
BC21
VSS54 VCC_CORE52
2D5V_PLLCPU
T6 VSS55 VCC_CORE53 V2
T4 T36
*
R98
VSS56 VCC_CORE54
T2 VSS57 VCC_CORE55 T34
R36 VSS58 VCC_CORE56 T32
R34 R6
39pF
VSS59 VCC_CORE57
AM24 R4
BC22
6
VSS60 VCC_CORE58
R32 VSS61 VCC_CORE59 R2
P6 VSS62 VCC_CORE60 AM18
10
P4 VSS63 VCC_CORE61 P36
P2 P34
NP
VSS64 VCC_CORE62
M36 VSS65 VCC_CORE63 P32
M34 VSS66 VCC_CORE64 M4
M32 VSS67 VCC_CORE65 M6
K6 M2
*
VSS68 VCC_CORE66
K4 VSS69 VCC_CORE67 K36
K2 VSS70 VCC_CORE68 K34
AM20 K32
NP
39pF
VSS71 VCC_CORE69
BC18
H36 VSS72 VCC_CORE70 H4
H34 VSS73 VCC_CORE71 H2
F26 VSS74 VCC_CORE72 AM14
F22 VSS75 VCC_CORE73 F36
F18 VSS76 VCC_CORE74 F34
F14 VSS77 VCC_CORE75 F32
F10 F28
VRMPWRGD
VSS78 VCC_CORE76
F6 VSS79 VCC_CORE77 F24
F4 VSS80 VCC_CORE78 F20
38
F2 VSS81 VCC_CORE79 F16
AM16 VSS82 VCC_CORE80 F12
D36 VSS83 VCC_CORE81 D32
D34 VSS84 VCC_CORE82 D28
D30 AM10
VCCP
VSS85 VCC_CORE83
5
D26 VSS86 VCC_CORE84 D24
D22 VSS87 VCC_CORE85 D20
D18 D16
BC82
BC69
BC56
BC68
BC64
BC43
VSS88 VCC_CORE86
D14 VSS89 VCC_CORE87 D12
****** D10 VSS90 VCC_CORE88 D8
D6 VSS91 VCC_CORE89 D4
B34 VSS92 VCC_CORE90 D2
processor.
10uF
10uF
10uF
10uF
10uF
10uF
AM12 VSS93 VCC_CORE91 B36
B30 B32
Place on the
VSS94 VCC_CORE92
B26 AM2
NP
NP
NP
NP
NP
NP
VSS95 VCC_CORE93
B22 VSS96 VCC_CORE94 B28
B18 VSS97 VCC_CORE95 B24
B14 B20
bottom side of the
VSS98 VCC_CORE96
B10 VSS99 VCC_CORE97 B16
B6 VSS100 VCC_CORE98 B12
B2 VSS101 VCC_CORE99 B8
AM4 VSS102 VCC_CORE100 B4
AK6 VSS103 VCC_CORE101 AJ5
AM6 VSS104
VCCP
VCC_Z AC7 AC7
AE7 AE7 VSS_Z
AJ23
BC72
BC67
BC70
BC60
BC44
BC89
NC9
NC7
NC6
NC3
NC2
NC1
NC45
NC44
NC43
NC42
NC37
NC36
NC35
NC34
NC32
NC30
NC29
NC28
NC27
NC25
NC24
NC23
NC22
NC21
NC20
NC19
NC18
NC17
NC16
NC15
NC13
NC12
NC11
NC10
BP3_CUT
BP2_CUT
BP1_CUT
BP0_CUT
THERMDA
THERMDC
FSB_SENSE0
FSB_SENSE1
VCC_A
Place near
******
J5
Y5
S7
U7
4
W7
J31
L31
Y31
S31
U31
N31
G19
G21
Q31
G31
G29
G27
G13
G11
AN9
AG5
W31
AJ27
AJ19
AJ17
AJ15
AJ11
AL25
AL27
AL11
AE31
AA31
CN1B
AN25
AN27
AH30
AN11
AC31
39pF
39pF
39pF
39pF
39pF
39pF
AG31
AG21
AG19
AG25
AG23
2D5V_PLLCPU
NP
NP
NP
NP
NP
NP
CPU_D-
CPU_D+
10uF(1206),one by one
CPU K7 Socket462
CPU_D-
FSB0
FSB1
CPU_D+
AE7
AC7
VCCP
31
R122
R132
BC78
BC79
BC52
BC53
13,16
13,16
27,31
NP
NP
VCCP
****
capacitors
BC54
BC47
BC40
BC55
BC76
BC86
BC92
BC77
BC58
BC73
BC75
BC57
BC46
BC41
BC91
BC87
BC74
0
56
39pF
39pF
39pF
39pF
*****************
Spare decoupling
VCCP
*
3
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF
0.22uF NP
0.22uF NP
0.22uF NP
0.22uF NP
0.22uF NP
0.22uF NP
0.22uF NP
0.22uF NP
0.22uF NP
BC19
0.1uF
NP
VCCP
VCCP
BC81
BC83
BC51
BC50
BC94
BC49
BC84
BC38
Located at Socket-A Cavity
BC42
BC45
BC63
BC59
BC88
BC66
BC62
BC71
BC65
BC61
BC90
BC85
BC48
BC39
BC93
********
***************
AMD recommandation
10uF
10uF
10uF
10uF
10nF
10nF
10nF
10nF
10uF(0805) X 4
1uF
1uF
1uF
1uF
1uF
0.01uF(0603) X 4
NP
NP
NP
NP
Changed on 1999/12/14
0.22uF(0603) X 32 [X7R]
1uF NP
1uF NP
1uF NP
1uF NP
1uF NP
1uF NP
1uF NP
1uF NP
1uF NP
1uF NP
0.22uF(0603) X 22 [X7R]
2
C
Title
Size
Date:
K7 - 2
Document Number
Monday, June 07, 2004
Sheet
741M01C
1
6
of
FOXCONN PCEG
40
Rev
A
A
B
C
D
A B C D E
ISL6563CR FOR K7 POWER
VCC5 Choke Coil 0.7uH
L9
*
VCC3 R25 VCC5 VIN
4 VCC5 VIN 4
10 EC7 EC8 EC6
BC3
* 1500uF
6.3V, +/-20%
* 1500uF
6.3V, +/-20%
* 1500uF
6.3V, +/-20%
* 4.7uF
* C82 CE50D100H300 CE50D100H300 CE50D100H300
2
4
6
8
R35 BC12 0.1uF
RN7
1K
*
BC6
4.7uF * 4.7uF
C0805
NP
R50
C0805 C0603
NP
C0805 2.7K
D
1K R0603
*
Q2
16
+/-5%
1
3
5
7
8
U4 R45
5 VID4 22 19 G
VCC
PVCC
VID4 UGATE1 AOD412
5 VID3 23 VID3 L11
24 1 Choke Coil 0.7uH
5 VID2 VID2
*
S
5 VID1 1 VID1 PHASE1 18 VCCP
5 VID0 2 VID0
D
3 DACSEL/VID5 Q4
R58
10 0 NP R48
R40 SSEND
VCCP 17 G 2.2
LGATE1
3
1
3
1
3
1
21 BC14 R59 AOD412 EC13 EC14 EC15
VCC5 ENLL
BC11
* 0.1uF 2.7K
S
R41 R32 10K R0603 2200uF 6.3V 2200uF 6.3V 2200uF 6.3V
10K
2
2
2
10K
* BC15 10nF 5 COMP BOOT1 20 +/-5% * BC17 NP
*
R38 0.1uF NP 10nF
56 BC9 0.1uF VIN
NP
*
*
1
R36 NP 6 11 BC7 BC2 C83
5 COREFB FB BOOT2
D
1K
VCC5
NP
R24
9 OFS
* 0.1uF
R42
R43
2.7K Q1
4.7uF
C0805
0.1uF
C0603
2
R0603 NP
150K R23 12 NP G
UGATE2 +/-5% AOD412
20K L10
1
TO263 Choke Coil 0.7uH
*
S
PHASE2 13
R26
D
VCC5 7 ISEN
3 Q3 3
3K R44
15 R54 NP G 2.2
LGATE2
3
1
3
1
3
1
4 0 AOD412 EC18 EC16 EC17
GND
VRM10
PGND 14
S
2200uF 6.3V 2200uF 6.3V 2200uF 6.3V
2
2
2
ISL6563 * BC16 NP
25
R49 10nF
2.7K
R0603
+/-5%
NP
BOTTOM PAD
CONNECT TO GND
2 2
1 1
FOXCONN PCEG
Title
POWER VCCP
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 7 of 40
A B C D E
8 7 6 5 4 3 2 1
Place near the 741 chip. AAD[0..31]
VCCP SDATA-[63:0] AAD[0..31] 18
5 SDATA-[63:0] SBA-[0..7]
R156 SBA-[0..7] 18
VP30 S2KCOMPND AC-BE[0..3]
S2KCOMPND
S2KCOMPPD
AC-BE[0..3] 18
C160
SDATA-10
SDATA-11
SDATA-12
SDATA-13
SDATA-14
SDATA-15
SDATA-16
SDATA-17
SDATA-18
SDATA-19
SDATA-20
SDATA-21
SDATA-22
SDATA-23
SDATA-24
SDATA-25
SDATA-26
SDATA-27
SDATA-28
SDATA-29
SDATA-30
SDATA-31
SDATA-32
SDATA-33
SDATA-34
SDATA-35
SDATA-36
SDATA-37
SDATA-38
SDATA-39
SDATA-40
SDATA-41
SDATA-42
SDATA-43
SDATA-44
SDATA-45
SDATA-46
SDATA-47
SDATA-48
SDATA-49
SDATA-50
SDATA-51
SDATA-52
SDATA-53
SDATA-54
SDATA-55
SDATA-56
SDATA-57
SDATA-58
SDATA-59
SDATA-60
SDATA-61
SDATA-62
SDATA-63
* ST[0..2]
SDATA-0
SDATA-1
SDATA-2
SDATA-3
SDATA-4
SDATA-5
SDATA-6
SDATA-7
SDATA-8
0.1uF 33 R0603
SDATA-9
ST[0..2] 18
R162 ADSTBF[0..1]
C0603
ADSTBF[0..1] 18
S2KCOMPPD
ADSTBS[0..1]
ADSTBS[0..1] 18
33 R0603
VCC1.8V
M25
M29
M27
G26
G25
G24
G29
G28
G27
C17
D17
C24
C25
C26
D25
C23
D23
C29
C28
C27
D29
D27
H25
H27
N25
R24
N24
R25
R27
R28
N26
N28
N29
N27
A25
B25
E24
A27
E23
B23
A24
B27
E25
E28
E26
E27
K26
K24
K27
K29
P27
P26
P24
F22
F23
F27
F26
F24
L24
L26
L25
J25
J28
J26
J24
J27
D D
SDATA#0
SDATA#1
SDATA#2
SDATA#3
SDATA#4
SDATA#5
SDATA#6
SDATA#7
SDATA#8
SDATA#9
SDATA#10
SDATA#11
SDATA#12
SDATA#13
SDATA#14
SDATA#15
SDATA#16
SDATA#17
SDATA#18
SDATA#19
SDATA#20
SDATA#21
SDATA#22
SDATA#23
SDATA#24
SDATA#25
SDATA#26
SDATA#27
SDATA#28
SDATA#29
SDATA#30
SDATA#31
SDATA#32
SDATA#33
SDATA#34
SDATA#35
SDATA#36
SDATA#37
SDATA#38
SDATA#39
SDATA#40
SDATA#41
SDATA#42
SDATA#43
SDATA#44
SDATA#45
SDATA#46
SDATA#47
SDATA#48
SDATA#49
SDATA#50
SDATA#51
SDATA#52
SDATA#53
SDATA#54
SDATA#55
SDATA#56
SDATA#57
SDATA#58
SDATA#59
SDATA#60
SDATA#61
SDATA#62
SDATA#63
S2KCOMPND
S2KCOMPPD
L29 S2KPVDD
L27 AGP3.0 = 50 ohm
VSSH
D22 VDDQ
S2KPVDD
A22 VSSH AGPRCOMN R177
VP39
HSTLVREFA L28 F6 AC-BE3
HSTLVREFB HSTLVREFA AC/BE#3 AC-BE2 +/-1%
C22 HSTLVREFB AC/BE#2 G4 49.9 R0603
K6 AC-BE1
741CCLK AC/BE#1 AC-BE0
16 741CCLK W29 CPUCLK AC/BE#0 K1
R174
SDATAINVAL- B19 E10 AGPRCOMP
5 SDATAINVAL- SDATAINVAL# AREQ# AREQ 18
CPURSTJ A12 B10 +/-1%
5 CPURSTJ CPURST# AGNT 18
HOST
PROCRDY AGNT# 43.2 R0603
5 PROCRDY C18 PROCRDY AFRAME# G1 AFRAME 18
CONNECT D18 H5
5 CONNECT CONNECT AIRDY# AIRDY 18
CLKFWDRST A18 H2
5 CLKFWDRST CLKFWDRST ATRDY# ATRDY 18
ADEVSEL# H4 ADEVSEL 18
SADDINCLK- A20 J5
5 SADDINCLK- SADDINCLK# ASERR# ASERR 18
SADDOUTCLK- U29 J6
5 SADDOUTCLK- SADDOUTCLK# ASTOP# ASTOP 18
VCC3
SDATAINCLK-0 A26 H1
SDATAINCLK#0 APAR APAR 18
SDATAINCLK-1 E29
VP38
SDATAINCLK-2 SDATAINCLK#1 A1XAVDD 0 R149
J29 SDATAINCLK#2 RBF# C9 RBF 18
SDATAINCLK-3 P29 C8
SDATAINCLK#3 WBF# WBF 18
5 SDATAINCLK-[0..3] NP
SDATAOUTCLK-0 A23 D10 GCDET- C169 C163
SDATAOUTCLK#0 GC_DET# GCDET- 18
SDATAOUTCLK-1
SDATAOUTCLK-2
F29
H29
SDATAOUTCLK#1
SDATAOUTCLK#2
PIPE#/ADBIH
ADBIL
B8
E8
DBI_HI
DBI_LOW
DBI_HI
DBI_LOW
18
18
* *
0.1uF 10nF
SDATAOUTCLK-3 R29 C0603
SDATAOUTCLK#3
5 SDATAOUTCLK-[0..3] SB_STBF B7 SBSTBF 18
SADDIN-2 D21 A6 JP38
SADDIN#2 SB_STBS SBSTBS 18
SADDIN-3 A1XAVSS
741-1
C20 SADDIN#3 2 1
SADDIN-4 F20 L1 ADSTBF0
SADDIN-5 SADDIN#4 AD_STBF0 ADSTBS0 NP SHORT
E21 SADDIN#5 AD_STBS0 L2
SADDIN-6 A21 SADDIN#6
C C
SADDIN-7 B21 E2 ADSTBF1
SADDIN-8 SADDIN#7 AD_STBF1 ADSTBS1 VCC3
D19 SADDIN#8 AD_STBS1 D1
SADDIN-9 C19
SADDIN-10 SADDIN#9 AGPCLK0
E20 A11
VP37
SADDIN#10 AGPCLK AGPCLK0 16
SADDIN-11 C21 A4XAVDD R150
SADDIN-12 SADDIN#11 AGPRCOMN 0
A19 SADDIN#12 AGPCOMP_N R1
SADDIN-13 F19 P3 AGPRCOMP NP
SADDIN-14 SADDIN#13 AGPCOMP_P A1XAVDD C164 C167
E18 SADDIN#14 A1XAVDD E11
5 SADDIN-[2..14]
SADDOUT-2 T29 SADDOUT#2
A1XAVSS F11 A1XAVSS
* *
0.1uF 10nF
SADDOUT-3 R26 A10 A4XAVDD C0603
SADDOUT-4 SADDOUT#3 A4XAVDD A4XAVSS
U25 SADDOUT#4 A4XAVSS B11
SADDOUT-5 U26 JP39
SADDOUT-6 SADDOUT#5 A4XAVSS
T25 SADDOUT#6 AGPVREF P2 AVREFGC 18 2 1
SADDOUT-7 U28
SADDOUT-8 SADDOUT#7 R171 0 NP SHORT
T27 SADDOUT#8 AGPVSSREF P1
SADDOUT-9
AGP
V26 R0603 NP
SADDOUT-10 SADDOUT#9
V27 SADDOUT#10
SADDOUT-11 U27
SADDOUT-12 SADDOUT#11
U24 SADDOUT#12
SADDOUT-13 V24
SADDOUT-14 SADDOUT#13
V29 SADDOUT#14
5 SADDOUT-[2..14] CPUCLKAVDD W26 CPUCLKAVDD
CPUCLKAVSS W25 CPUCLKAVSS
CPUPHYAVDD E17 CPUPHYAVDD
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16
AAD17
AAD18
AAD19
AAD20
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
AAD29
AAD30
AAD31
CPUPHYAVSS
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8
F17 AAD9
SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0
CPUPHYAVSS
ST0
ST1
ST2
C5
A4
B5
C6
F8
E7
A7
D7
D9
A9
F9
N1
P4
N3
P5
M2
N4
M3
N6
M5
K3
M6
L5
L4
J2
K4
J3
G3
G6
F2
F5
F3
E4
E1
E5
C2
D3
C3
D4
B2
D6
B4
A3
U6A
741
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16
AAD17
AAD18
AAD19
AAD20
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
AAD29
AAD30
AAD31
SBA-7
SBA-6
SBA-5
SBA-4
SBA-3
SBA-2
SBA-1
SBA-0
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8
AAD9
ST0
ST1
ST2
B B
VCC3 Place near the 741 chip. VCCP VCCP
R189
VP27 CPUCLKAVDD VP31 VP31
0 NP C215 C216
* *
0.1uF 10nF
*
C201
10nF
*
C178
10nF Put near 741 chip
C0603 JP37 R169 NP R164 NP VCCP
2 1 CPUCLKAVSS C189 100 C161 100
NP SHORT * 0.1uF R0603
HSTLVREFA * 0.1uF R0603
HSTLVREFB
VP29
C0603 (15 mil trace) C0603 (15 mil trace) R180
VCC3 C204 C179 60.4
R163 CPUPHYAVDD R170 * 10nF
R165 * 10nF R0603
+/-1%
0 NP C166 C162 100 100 741CCLK
* *
0.1uF 10nF R0603 R0603
C0603 JP52
2 1 CPUPHYAVSS
NP SHORT
A A
FOXCONN PCEG
Title
741-1 HOST&AGP
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 8 of 40
8 7 6 5 4 3 2 1
/RMD[0..63] /RMA[0..15] /RRAMWA- 10 mil wire
/RMD[0..63] 20,22 /RMA[0..15] 20,22 /RRAMWA- 20,22
/RSRAS- /RSRAS- 20,22 CSA-2 /RCS-2
/RDQM[0..7] /RCS-[0..3] /RSCAS- CSA-3 /RCS-3 MAA15 R284 0 NP /RMA15
/RDQM[0..7] 20,22 /RCS-[0..3] 20,22 /RSCAS- 20,22
/RDQS[0..7] MAA14 R297 0 NP /RMA14
/RDQS[0..7] 20,22
MAA13 R269 0 NP /RMA13
MD1 /RMD1 MAA9 R296 0 NP /RMA9
MD1
MD5
RN32 2
10 4
*1
3
/RMD1
/RMD5
U6B
10 mil wire
MD5
MD4
/RMD5
/RMD4
MAA4 R263 0 NP /RMA4
MD4 NP 6 5 /RMD4 MD0 AF29 AG17 MAA0 MD0 /RMD0 MAA7 R268 0 NP /RMA7
MD0 /RMD0 MD1 MD0 MAA0 MAA1 MD6 /RMD6 MAA6 R265 0 NP /RMA6
8 7 AC25 AF17
MD6
MD2
RN31 2
10 4
*1
3
/RMD6
/RMD2
MD2
MD3
AF28
AE28
MD1
MD2
MAA1
MAA2 AD17
AH18
MAA2
MAA3
MD2
DQM0
/RMD2
/RDQM0
MAA5
MAA8
R266
R267
0
0
NP
NP
/RMA5
/RMA8
MD3 MAA3
D D
DQM0 NP 6 5 /RDQM0 MD4 AB24 AG18 MAA4 DQS0 /RDQS0
DQS0 /RDQS0 MD5 MD4 MAA4 MAA5 MD9 /RMD9 MAA0 R300 0 NP /RMA0
8 7 AE27 AJ22
MD9
MD8
RN30 2
10 4
*1
3
/RMD9
/RMD8
MD6
MD7
AD26
AC26
MD5
MD6
MAA5
MAA6 AG21
AD21
MAA6
MAA7
MD8
MD3
/RMD8
/RMD3
MAA1
MAA2
R304
R305
0
0
NP
NP
/RMA1
/RMA2
MD3 NP /RMD3 DQM0 MD7 MAA7 MAA8 MD7 /RMD7 MAA3 R262 0 NP /RMA3
6 5 AD27 DQM0 MAA8 AE21
MD7 8 7 /RMD7 DQS0 AD29 AF22 MAA9 DQM1 /RDQM1
DQM1
MD13
RN29 2
10 4
* 1
3
/RDQM1
/RMD13
MD8
MD9
AG27
AF25
DQS0/CSB#0
MD8
MAA9
MAA10 AJ17
AD14
MAA10
MAA11
MD13
DQS1
/RMD13
/RDQS1
SRASA-
MAA11
R273
R293
0
0
NP
NP
/RSRAS-
/RMA11
DQS1 NP /RDQS1 MD10 MD9 MAA11 MAA12 MD12 /RMD12 MAA12 R299 0 NP /RMA12
6 5 AH28 MD10 MAA12 AE16
MD12 8 7 /RMD12 MD11 AG26 AE22 MAA13 MD10 /RMD10 MAA10 R301 0 NP /RMA10
MD10
MD11
RN28 2
10 4
* 1
3
/RMD10
/RMD11
MD12
MD13
AH27
AG29
MD11
MD12
MAA13
MAA14 AD20
AD11
MAA14
MAA15
MD11
MD15
/RMD11
/RMD15 RAMWA- R291 0 NP /RRAMWA-
MD15 NP /RMD15 MD14 MD13 MAA15 MD14 /RMD14 SCASA- R289 0 NP /RSCAS-
6 5 AJ26 MD14
MD14 8 7 /RMD14 MD15 AE25 AH13 RAMWA- DQS2 /RDQS2 CSA-0 R272 0 NP /RCS-0
DQS2
MD21
RN26 2
10 4
* 1
3
/RDQS2
/RMD21
DQM1
DQS1
AF26
AJ27
MD15
DQM1
RAMWA#
SRASA# AJ13
AH12
SRASA-
SCASA-
MD21
MD17
/RMD21
/RMD17
CSA-1 R270 0 NP /RCS-1
MD17 NP /RMD17 MD16 DQS1/CSB#1 SCASA# MD16 /RMD16 CSA-2 R271 0 NP /RCS-2
6 5 AG24 MD16
MD16 8 7 /RMD16 MD17 AE24 DQS3 /RDQS3 CSA-3 R288 0 NP /RCS-3
DQS3
MD25
RN34 2
10 4
* 1
3
/RDQS3
/RMD25
MD18
MD19
AF23
AG23
MD17
MD18
MD25
MD29
/RMD25
/RMD29
MD29 NP /RMD29 MD20 MD19 MD28 /RMD28
6 5 AH25 MD20
MD28 8 7 /RMD28 MD21 AD24 MD31 /RMD31 MD53 /RMD53 MAA15 /RMA15
MD31
MD27
RN33 2
10 4
* 1
3
/RMD31
/RMD27
MD22
MD23
AH22
AJ23
MD21
MD22
MD27
MD30
/RMD27
/RMD30
MD49
MD47
/RMD49
/RMD47 MAA14 /RMA14
MD30 NP /RMD30 DQM2 MD23 MD26 /RMD26 MD43 /RMD43 MAA13 /RMA13
6 5 AD23 DQM2
MD26 8 7 /RMD26 DQS2 AH24 MD37 /RMD37 MD57 /RMD57 MAA9 /RMA9
MD37
MD33
RN24 2
10 4
* 1
3
/RMD37
/RMD33
MD24
MD25
AH21
AH19
DQS2/CSB#2
MD24
MD33
MD36
/RMD33
/RMD36
MD61
MD56
/RMD61
/RMD56
MAA4 /RMA4
MD36 NP /RMD36 MD26 MD25 MD32 /RMD32 MD60 /RMD60 MAA7 /RMA7
6 5 AE18 MD26
MD32 8 7 /RMD32 MD27 AD18 MD40 /RMD40 MD58 /RMD58 MAA6 /RMA6
* MD27
741-2
MD40 RN22 2 1 /RMD40 MD28 AG20 MD44 /RMD44 DQS7 /RDQS7 MAA5 /RMA5
MD44 10 /RMD44 MD29 MD28 MD35 /RMD35 MD62 /RMD62 MAA8 /RMA8
4 3 AJ20 MD29
MD35 NP 6 5 /RMD35 MD30 AF19 MD39 /RMD39 DQM7 /RDQM7
MD39 /RMD39 MD31 MD30 MD38 /RMD38 MAA0 /RMA0
8 7 AE19
MD38
DQM4
RN23 2
10 4
* 1
3
/RMD38
/RDQM4
DQM3
DQS3
AF20
AJ19
MD31
DQM3
DQM4
MD34
/RDQM4
/RMD34
MD19
MD18
/RMD19
/RMD18
MAA1
MAA2
/RMA1
/RMA2
MD34 NP /RMD34 MD32 DQS3/CSB#3 DQS4 /RDQS4 DQM2 /RDQM2 MAA3 /RMA3
6 5 AE15 MD32
DQS4 8 7 /RDQS4 MD33 AF14 MD42 /RMD42 MD23 /RMD23
C
MD42
DQS5
RN18 2
10 4
* 1
3
/RMD42
/RDQS5
MD34
MD35
AJ14
AF13
MD33
MD34
AE12 CSA-0
DQS5
DQM5
/RDQS5
/RDQM5
MD22
MD24
/RMD22
/RMD24
SRASA-
MAA11
/RSRAS-
/RMA11 C
DQM5 NP /RDQM5 MD36 MD35 CSA#0 CSA-1 MD41 /RMD41 DQM3 /RDQM3 MAA12 /RMA12
6 5 AF16 MD36 CSA#1 AD12
8 7 MD37 AD15 AG12 CSA-2 MD46 /RMD46 MD63 /RMD63 MAA10 /RMA10
MD41 NP R290 10 /RMD41 MD38 MD37 CSA#2 CSA-3 MD48 /RMD48 MD59 /RMD59
AE13 MD38 CSA#3 AJ11
MD46 NP R287 10 /RMD46 MD39 AG14 AG11 MD55 /RMD55 MD20 /RMD20 RAMWA- /RRAMWA-
MD48 NP R286 10 /RMD48 DQM4 MD39 CSA#4 DQM6 /RDQM6 MD51 /RMD51 SCASA- /RSCAS-
AG15 DQM4 CSA#5 AF11
MD55 NP R278 10 /RMD55 DQS4 AH15 DQS6 /RDQS6 MD52 /RMD52 CSA-0 /RCS-0
DQM6 NP R283 10 /RDQM6 MD40 DQS4/CSB#4 MD50 /RMD50 CSA-1 /RCS-1
AH9 MD40
DQS6 NP R281 10 /RDQS6 MD41 AF10 MD54 /RMD54
MD42 MD41 DDRVREFA MD45 /RMD45
AG9 AJ25
MD53
MD49
RN21 2
10 4
*1
3
/RMD53
/RMD49
MD43
MD44
AG8
AE10
MD42
MD43
DDRVREFA
DDRVREFB AJ8 DDRVREFB
MD47 NP /RMD47 MD45 MD44 DLLAVDD
6 5 AD9 MD45 DLLAVDD Y29
MD43 8 7 /RMD43 MD46 AE9 Y28 DLLAVSS
MD57
MD61
RN20 2
10 4
*1
3
/RMD57
/RMD61
MD47
DQM5
AH8
AH10
MD46
MD47
DLLAVSS
MD56 NP /RMD56 DQS5 DQM5 R208 For debug only VCC2.5_MEM
6 5 AJ10 DQS5/CSB#5 SDRCLKI AH16
MD60 8 7 /RMD60 MD48 AE7 0 RN45
MD58
DQS7
RN19 2
10 4
*1
3
/RMD58
/RDQS7
MD49
MD50
AJ6
AG7
MD48
MD49 FWDSDCLKO AJ16 FWDSDCLKO CKE2
CKE0
2
4
*1
3
VP44
MD62 NP /RMD62 MD51 MD50 CKE3
6 5 AH6 MD51 6 5
DQM7 8 7 /RDQM7 MD52 AF8 W28 DDRAVDD CKE[0..3] CKE1 8 7
MD19
RN25 2
10 4
* 1
3 /RMD19
MD53
MD54
AJ5
AD8
MD52
MD53
DDRAVDD
DDRAVSS W27 DDRAVSS CKE[0..3] 20
4.7K +/-5%
MD18 NP /RMD18 MD55 MD54 RN27 8P4R0603
6 5 AF6
DQM2 8 7 /RDQM2 DQM6
DQS6
AD7
AH7
MD55
DQM6 CKE0 AF1
AG1
CCKE0
CCKE1
2
4
*1
3
CKE2
CKE0
NP
MD23 NP R295 10 /RMD23 MD56 DQS6/CSB#6 CKE1 CCKE2 CKE3
AG4 MD56 CKE2 AE2 6 5
MD22 NP R294 10 /RMD22 MD57 AG5 AE3 CCKE3 8 7 CKE1
MD24 NP R264 10 /RMD24 MD58 MD57 CKE3
AJ3 MD58 CKE4 AF2
DQM3 NP R306 10 /RDQM3 MD59 AH2 AE1 NP 0
MD63 NP R276 10 /RMD63 MD60 MD59 CKE5 CCKE0 CKE0 VCC2.5_MEM
AH5 MD60
MD59 NP R277 10 /RMD59 MD61 AF5 AD5 CCKE1 CKE1
MD20 NP R298 10 /RMD20 MD62 MD61 S3AUXSW# CCKE2 CKE2 DDRCOMN R261 47+/-1% VP46
AE6 MD62
MD51 NP R279 10 /RMD51 MD63 AH3 CCKE3 CKE3 DDRCOMP R204 33+/-1%
MD52 NP R285 10 /RMD52 DQM7 MD63 DDRCOMP
AE4 DQM7 DDRCOMP_P AG2
MD50 NP R280 10 /RMD50 DQS7 AH4 AF3 DDRCOMN
DQS7/CSB#7 DDRCOMP_N
B B
MD54 NP R282 10 /RMD54
MD45 NP R292 10 /RMD45
741
R209 Put near 741 chip.
VCC2.5_MEM VCC2.5_MEM
VCC3 FWDSDCLKO
FWDSDCLKO- 17
VP40
VP41
VP43
C238 C234 DLLAVDD R191 22
* 10nF
NP R212 * 10nF
NP R211
NP 0 R0603
*
C237
10pF
150
R0603
150
R0603
* C221
0.1uF * C222
10nF * BC98
10uF
C0603
DDRVREFA DDRVREFB NP
( 10-mil trace ) +/-1% ( 10-mil trace ) +/-1% C1206
JP40
25-mil clearance C241 25-mil clearance C243 DLLAVSS 2 1
or shielded by
VSS trace and * 10nF R205
150
or shielded by
VSS trace and * 10nF R206
150 NP SHORT
VDD trace VDD trace
R0603 R0603
+/-1% +/-1%
VCC3
VP42
DDRAVDD R187
0
NP BC97
* C209
0.1uF * C210
10nF * 10uF
NP
A A
C1206
JP41
DDRAVSS 2 1
NP SHORT
FOXCONN PCEG
Title
741-2 DDR
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 9 of 40
8 19 DDC1DATA R146
R0603
7 100
+/-5%
6 5 4 3 2 1
R139 100
19 DDC1CLK R0603 +/-5% 2D5V_CPU
INT-A 12,18,23,24
R145 33
19 VSYNC VCC3
R144 33
19 HSYNC
2
4
6
8
19 BOUT CPUDLLENJ R143 4.7K NP RN13
19 GOUT TESTMODE0 R142 4.7K NP
B17 DCLKAVDD
B16 ECLKAVDD
A16 DCLKAVSS
C16 ECLKAVSS
680
E15 DACAVDD
C15 DACAVDD
19 ROUT
F15 DACAVSS
D16 DACAVSS
CSYNC
RSYNC
LSYNC
TESTMODE1 R141 4.7K NP
F16 VVBWN
A15 VCOMP
E16 VRSET
16 VOSCI TESTMODE2 R140 4.7K NP
*1
3
5
7
CSYNC R152 4.7K NP
The differences between RSYNC R153 4.7K
C14
D15
D14
C13
A17
B14
A14
B15
E14
B13
A13
F14
U6C LSYNC R151 4.7K NP FID0 5 FID[3:0] FID[3:0]
the traces of MuTIOL
D D
741 FID1
Strobes and Data should CSYNC R159 4.7K FID3
VOSCI
VCOMP
DCLKAVSS
ECLKAVSS
ROUT
GOUT
BOUT
VRSET
VGPIO0
VGPIO1
INTA#
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
HSYNC
VSYNC
CSYNC
RSYNC
LSYNC
VVBWN
DCLKAVDD
ECLKAVDD
be smaller than 0.05" RSYNC R160 4.7K NP FID2
ZCLK0 AC1 LSYNC R158 4.7K
16 ZCLK0 ZCLK TRAP4 R148 4.7K NP NB Hardware Trap has internal pull-low in SiS741 chip FOR TRAP[0..3].
ZSTB0 AA1
12 ZSTB0 ZSTB-0 ZSTB0
12 ZSTB-0 AA2 ZSTB#0 (FID3) (FID2) (FID1) (FID0)
ZSTB1 V2 E13 TESTMODE0
12 ZSTB1 ZSTB-1 ZSTB1 TESTMODE0 TESTMODE1 11.0 0 0 0 0
12 ZSTB-1 W2 ZSTB#1 TESTMODE1 D13
F12 TESTMODE2 11.5 0 0 0 1
TESTMODE2
741-3
12.0 0 0 1 0
Z1XAVDD AD4 B12 TRAP0 12.5 0 0 1 1
Z1XAVSS Z1XAVDD TRAP0 TRAP1 5.0 0 1 0 0
AC6 Z1XAVSS TRAP1 E12
D12 TRAP2 5.5 0 1 0 1
Z4XAVDD TRAP2 TRAP3 6.0 0 1 1 0
AC4 Z4XAVDD TRAP3 C12
Z4XAVSS AC5 C11 TRAP4 6.5 0 1 1 1
Z4XAVSS TRAP4 7.0 1 0 0 0
D11 741_ENTEST R155 4.7K 7.5 1 0 0 1
ZCMP_N ENTEST CPUDLLENJ 8.0 1 0 1 0
AC3 ZCMP_N DLLEN# F13
8.5 1 0 1 1
ZCMP_P AB4 9.0 1 1 0 0
ZCMP_P
MuTIOL AD1
9.5
10.0
1
1
1
1
0
1
1
0
PCIRST# NBRST- 12 10.5 1 1 1 1
ZVREF AC2 ZVREF
AD2 PWRGD_NB
PWROK PWRGD_NB 5,38
ZUREQ AB6
12 ZUREQ ZDREQ ZUREQ AUXOK
12 ZDREQ AB5 ZDREQ AUXOK AD3 AUXOK 13,35
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
C224 C219
AA4 * 0.1uF
* 0.1uF
AB2
AA6
Y5
Y3
W6
Y1
Y4
W5
W3
V4
V6
U3
U5
V1
U4
AB3
C0603 C0603
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD16
The differences between
ZAD15
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
the traces of MuTIOL
C Strobes and Data should
be smaller than 0.05"
C
ZAD[0..16]
12 ZAD[0..16]
Should not change layer
VCC3
FB4
DCLKAVDD 2 1
C168 C175 BC33
* *
1
10nF 0.1uF NP 0 10uF
NP
JP44 C0603 C1206
2
DCLKAVSS 2 1
NP SHORT
VCC3
B B
FB3
ECLKAVDD 2 1
C177 C183 BC36
* *
1
Place near 741 chip. 10nF NP 0 10uF
NP
JP45 0.1uFC0603 C1206
2
VCC1.8V ECLKAVSS 2 1
R190 ZCMP_N NP SHORT
C182
VCC3 VCC3 56
* C212 VVBWN 0.1uF C0603 VRSET
* *
R194 0 Z4XAVDD R207 Z1XAVDD R188 0.1uF
C181
NP C225 C226 NP 0 C232 C236 150
10uF 10uF
* C229 * 10nF
* 0.1uF
* C235 * 10nF
* 0.1uF
*
C214
10nF
+/-1%
ZVREF
VCOMP 0.1uF C0603
VCC1.8V R161
NP JP42 NP JP43 C0603 FB2 130
2 1 Z4XAVSS 2 1 Z1XAVSS NP C208 DACAVDD 2 1 R0603
*
0.1uF 0.1uF C0603
* *
C0603 BC37
+/-1%
1
NP SHORT NP SHORT R186 NP 0 10uF
49.9 NP
+/-1% JP46 C170 C176 0.1uF C1206
2
R185 ZCMP_P DACAVSS 2 1
150 Ohm for MuTIOL 1.0/66MHz 56 NP SHORT
49.9 Ohm for MuTIOL 2.0/133Mhz
A A
FOXCONN PCEG
Title
741-3 MuTIOL Link
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 10 of 40
8 7 6 5 4 3 2 1
VDDQ
VP54
BC96 10uFC1206 VCC2.5_MEM
NP 1 2 IVDD VCCP
VP55
VP53 VP66
VCC3 VCC3 C233 NP 2 110uF NP 2 110uF
* * * * * * * *
C211 0.1uF C0603 BC35 C1206 BC95 C1206
1uF 0.1uF C0603 VP52
* C240 C159 C190
* * * *
*
* * * *
C0603 C217 0.1uF C0603 0.1uF C0603 1uF C0603
C155
* *
0.1uF C0603 C242 C173 C203
1uF C0603 0.1uF C0603 0.1uF C0603
C156
D D
0.1uF C0603 C244 C172 C174
1uF C0603 0.1uF C0603 0.1uF C0603
C195 C261 C158 C180
*
0.1uF C0603 0.1uF C0603 0.1uF C0603 0.1uF C0603
AUX_IVDD C227
SB3V 0.1uF C0603
VCCP
C230
NP 0.1uF C0603 VP65
* *
2
VCC1.8V VDDQ VCC3 C247 C248 BC102 2 110uF
0.1uF 1uF 10uF C258 NP BC34 C1206
C0603 C0603 C1206 0.1uF C0603
1
C165
V12
V13
V14
V15
V16
* * * *
1uF C0603
W10
M10
AB1
AA3
N10
V10
K14
K13
K12
K11
K10
K15
Y10
L10
J14
J15
J16
W1
U6D U6E
Y2
V3
Y9
J9
AD6 C202
VSSM
VSSM
VSSM
VSSM
VSSM
VCC2.5_MEM VSSM 0.1uF C0603
AE5
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD3.3
VDD3.3
VDD3.3
VDD3.3
AUX3.3
AUX_IVDD
VSSM
A8 OVSS VSSM AF4
W24 B9 AG3 C200
VDDM OVSS VSSM 0.1uF C0603
J10 PVDD VDDM Y24 C10 OVSS VSSM AJ4
J13 PVDD VDDM Y25 A5 OVSS VSSM AG6
K9 Y26 B6 AF7 C196
PVDD VDDM OVSS VSSM 0.1uF C0603
N9 PVDD VDDM Y27 C7 OVSS VSSM AJ7
IVDD V9 AA24 D8 AJ9
PVDD VDDM OVSS VSSM
W9 PVDD VDDM AA25 E9 OVSS VSSM AE8
VDDM AA26 F10 OVSS VSSM AF9
P6 IVDD VDDM AA27 B3 OVSS VSSM AG10
R2 IVDD VDDM AA28 C4 OVSS VSSM AH11
R3 IVDD VDDM AA29 D5 OVSS VSSM AJ12
R4 IVDD VDDM AB25 E6 OVSS VSSM AD10
R5 IVDD VDDM AB26 F7 OVSS VSSM AE11
R6 IVDD VDDM AB27 C1 OVSS VSSM AF12
T1 IVDD VDDM AB28 D2 OVSS VSSM AG13
T2 IVDD VDDM AB29 E3 OVSS VSSM AH14
T3 IVDD VDDM AC28 F4 OVSS VSSM AJ15
T4 IVDD VDDM AC29 G5 OVSS VSSM AD13
C T5
T6
IVDD
IVDD VDDM W20
H6
F1
OVSS
OVSS
VSSM
VSSM
AE14
AF15 C
741-5
U1 IVDD VDDM Y11 G2 OVSS VSSM AG16
U2 IVDD VDDM Y12 H3 OVSS VSSM AH17
Y13 J4 AJ18 IVDD
VDDM OVSS VSSM
P9 IVDD VDDM Y14 K5 OVSS VSSM AD16
R9 Y15 L6 AE17 VP59
IVDD VDDM OVSS VSSM
T9 IVDD VDDM Y16 J1 OVSS VSSM AF18
U9 Y17 K2 AG19 C377 NP C384 NP
IVDD VDDM OVSS VSSM
*
*
741-4
P10 Y18 L3 AH20 0.1uF 0.1uF
IVDD VDDM OVSS VSSM C382 NP C385 NP
R10 IVDD VDDM Y19 M4 OVSS VSSM AJ21
*
*
T10 Y20 N5 AD19 0.1uF 0.1uF
IVDD VDDM OVSS VSSM
Ground
U10 Y21 M1 AE20 C373 NP C381 NP
IVDD VDDM OVSS VSSM
*
*
L11 AA9 N2 AF21 0.1uF 0.1uF
IVDD VDDM OVSS VSSM C374 NP
M11 IVDD VDDM AA10 VSSM AG22
*
N11 AA13 AH23 0.1uF
IVDD VDDM VSSM
P11 IVDD VDDM AA14 U6 OVSS VSSM AJ24
Power
R11 IVDD VDDM AA15 V5 OVSS VSSM AD22
T11 IVDD VDDM AA16 W4 OVSS VSSM AE23
U11 IVDD VDDM AA17 Y6 OVSS VSSM AF24
V11 IVDD VDDM AA20 AA5 OVSS VSSM AG25
L12 AA21 VCCP AH26 VCC1.8V VDDQ
IVDD VDDM VSSM
L13 IVDD M12 OVSS VSSM AC24
L14 B18 M13 AD25 C386 NP C379 NP
IVDD S2KOVDD OVSS VSSM
* *
*
L15 B20 N12 AE26 0.1uF 0.1uF
IVDD S2KOVDD OVSS VSSM C371 NP
L16 IVDD S2KOVDD B22 N13 OVSS VSSM AF27
*
L17 B24 P12 AG28 C271 NP 0.1uF
IVDD S2KOVDD OVSS VSSM 0.1uF C368 NP
L18 IVDD S2KOVDD B26 P13 OVSS VSSM AC27
*
L19 B28 P14 AD28 0.1uF
IVDD S2KOVDD OVSS VSSM C376 NP
M19 IVDD S2KOVDD D28 P15 OVSS VSSM AE29
*
N19 F28 P16 0.1uF
IVDD S2KOVDD OVSS VCC2.5_MEM
P19 IVDD S2KOVDD H28 R12 OVSS
R19 IVDD S2KOVDD K28 R13 OVSS VSSH E19
T19 M28 R14 F18 VCCP VP57
IVDD S2KOVDD OVSS VSSH
U19 IVDD S2KOVDD P28 R15 OVSS VSSH E22
V19 T28 R16 F21 VP60 C391 NP
IVDD S2KOVDD OVSS VSSH
*
W19 V28 T12 F25 0.1uF
IVDD S2KOVDD OVSS VSSH C380 NP C369 NP C392 NP
W12 IVDD S2KOVDD D20 T13 OVSS VSSH H24
*
*
*
B B
W13 D24 T14 K25 0.1uF C0603 0.1uF C0603 0.1uF
IVDD S2KOVDD OVSS VSSH C383 NP C375 NP C390 NP
W14 IVDD S2KOVDD D26 T15 OVSS VSSH M24
*
*
*
W15 H26 T16 P25 0.1uF C0603 0.1uF C0603 0.1uF
IVDD S2KOVDD OVSS VSSH C372 NP C370 NP C389 NP
W16 IVDD S2KOVDD M26 U12 OVSS VSSH T24
*
*
*
W17 T26 U13 V25 0.1uF C0603 0.1uF C0603 0.1uF
IVDD S2KOVDD OVSS VSSH C378 NP C197 NP C388 NP
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
S2KOVDD
W18 U14
S2KPVDD
S2KPVDD
S2KPVDD
S2KPVDD
S2KPVDD
IVDD OVSS
*
*
*
VCC1.8V W11 U15 0.1uF C0603 0.1uF C0603 0.1uF
IVDD OVSS C387 NP
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
VSSH
U16 OVSS
*
0.1uF
741 741 under 741 BOTTOM SIDE
J17
J20
K21
P21
U21
J21
K16
K17
K18
K19
K20
L20
M20
N20
P20
R20
T20
U20
V20
N21
R21
T21
M14
M15
M16
M17
M18
N14
N15
N16
N17
N18
P17
R17
T17
U17
V17
P18
R18
T18
U18
V18
A A
FOXCONN PCEG
Title
741-4 POWER
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 11 of 40
8 VCC3
7 AD[0..31]
6 5 4 3 2 1
23,24 AD[0..31]
RN9 VCC1.8V
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
INT-A
INT-C
2
4
*1
3
INT-D
INT-B
6
8
5
7 963/963L-1 C330
8.2K * 0.1uF
H2
H1
N5
R2
R3
R1
U1
U2
R5
U3
K4
K5
K2
K1
P2
P3
P4
P5
V1
T1
T2
T3
L3
L1
L4
L5
L2
J5
J4
J3
J2
J1
8P4R0603 U11A C0603
VCC5
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Y3 JP49
PREQ-4 IDEAVDD
F1 PREQ4# IDEAVSS Y4 2 1
PREQ-4 R312 4.7K NP PREQ-3 F2
R0603 +/-5% PREQ-2 PREQ3# NP SHORT ICHRDYA
24 PREQ-2 E1 PREQ2# ICHRDYA W10 ICHRDYA 25
PREQ-1 H5 V10 IDEREQA
23 PREQ-1 PREQ1# IDREQA IDEREQA 25
D D
PREQ-3 R310 4.7K NP PREQ-0 F3 Y11 IDEIRQA
23 PREQ-0 PREQ0# IIRQA IDEIRQA 25
PCI
R0603 +/-5% U12 CBLIDA
CBLIDA CBLIDA 25
H3 PGNT4#
PREQ-5 R331 4.7K NP G1 V11 IDEIOR-A
PGNT3# IIORA# IDEIOR-A 25
R0603 +/-5% PGNT-2 G2 Y9 IDEIOW-A
24 PGNT-2 PGNT2# IIOWA# IDEIOW-A 25
PREQ-5 PGNT-1 G3 Y10 IDACK-A
23,24 PREQ-5 23 PGNT-1 PGNT1# IDACKA# IDACK-A 25
PGNT-0 H4
23 PGNT-0 PGNT0# IDESAA2
23,24 C/BE-[0..3] IDSAA2 T11
C/BE-3 K3 U11 IDESAA1 IDESAA[0..2]
C/BE3# IDSAA1 IDESAA[0..2] 25
C/BE-2 M4 W11 IDESAA0
C/BE-1 C/BE2# IDSAA0
P1 C/BE1#
C/BE-0 R4 T12 IDECS-A1 IDECS-A[0..1]
C/BE0# IDECSA1# IDECS-A[0..1] 25
V12 IDECS-A0
INT-A IDECSA0#
10,18,23,24 INT-A E3 INTA#
INT-B F4
18,23,24 INT-B INT-C INTB# ICHRDYB
23,24 INT-C E2 INTC# ICHRDYB W17 ICHRDYB 25
INT-D G4 Y17 IDEREQB
23,24 INT-D INTD# IDREQB IDEREQB 25
T16 IDEIRQB
IIRQB IDEIRQB 25
FRAME- M3 U17 CBLIDB
23,24 FRAME- FRAME# CBLIDB CBLIDB 25
IRDY- M1
23,24 IRDY- IRDY#
IDE
TRDY- M2 T14 IDEIOR-B
23,24 TRDY- TRDY# IIORB# IDEIOR-B 25
STOP- N4 W16 IDEIOW-B
23,24 STOP- STOP# IIOWB# IDEIOW-B 25
V16 IDACK-B
IDACKB# IDACK-B 25
SERR- M5
23,24 SERR- PAR SERR# IDESAB2
23,24 PAR N3 PAR IDSAB2 Y18
DEVSEL- N1 T15 IDESAB1 IDESAB[0..2]
23,24 DEVSEL- DEVSEL# IDSAB1 IDESAB[0..2] 25
PLOCK- N2 V17 IDESAB0
23,24 PLOCK- PLOCK# IDSAB0
96XPCLK Y2 U16 IDECS-B1 IDECS-B[0..1]
16 96XPCLK PCICLK IDECSB1# IDECS-B[0..1] 25
PCIRST- R242 33R0603 C3 W18 IDECS-B0
18,23,24,25 PCIRST- R241 33R0603 PCIRST# IDECSB0#
27 SIORST- R243 33R0603 IDEDA0
10 NBRST- IDA0 U10
V9 IDEDA1
IDA1 IDEDA2
IDA2 W8
T9 IDEDA3
ZCLK1 IDA3 IDEDA4
16 ZCLK1 V20 ZCLK IDA4 Y7
V7 IDEDA5
ZSTB0 IDA5 IDEDA6
10 ZSTB0 M19 ZSTB0 IDA6 Y6
C C
ZSTB-0 N20 Y5 IDEDA7
10 ZSTB-0 ZSTB0# IDA7 IDEDA8
IDA8 W6
ZSTB1 J20 U8 IDEDA9
10 ZSTB1 ZSTB-1 ZSTB1 IDA9 IDEDA10
10 ZSTB-1 K20 ZSTB1# IDA10 W7
V8 IDEDA11
IDA11 IDEDA12
IDA12 U9
ZUREQ N16 Y8 IDEDA13
10 ZUREQ ZDREQ ZUREQ IDA13 IDEDA14
10 ZDREQ N17 ZDREQ IDA14 T10
W9 IDEDA15
IDA15
SVDDZCMP R19 Y16 IDEDB0
VDDZCMP IDB0 IDEDA[0..15] 25
SZCMP_N N18 V15 IDEDB1
ZCMP_N IDB1 IDEDB2
IDB2 U14
VCC1.8V SZCMP_P R18 W14 IDEDB3
SVSSZCMP ZCMP_P IDB3 IDEDB4
P18 VSSZCMP IDB4 V13
T13 IDEDB5
IDB5 IDEDB6
IDB6 Y13
SZ1XAVDD U20 Y12 IDEDB7
R319 SZ1XAVSS Z1XAVDD IDB7 IDEDB8
U19 Z1XAVSS IDB8 W12
150 W13 IDEDB9
IDB9
MuTIOL 1G
+/-1% SZ4XAVDD T20 U13 IDEDB10
R0603 SZ4XAVSS Z4XAVDD IDB10 IDEDB11
T19 Z4XAVSS IDB11 Y14
SZVREF V14 IDEDB12
SZVREF IDB12 IDEDB13
R20 ZVREF IDB13 W15
C296 ZAD16 P20 Y15 IDEDB14
ZAD16 IDB14
R320
* 0.1uF
IDB15 U15 IDEDB15
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
49.9
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
+/-1% C0603
IDEDB[0..15] 25
R0603
SIS963
M18
N19
M17
M16
M20
L16
L20
L18
K18
K19
K17
K16
H20
J18
H19
H18
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
10 ZAD[0..16]
B B
Put near 96X Chip.
Analog Power supplies of Transzip function for 96X Chip. VCC1.8V only for MUTIOL 1.0 backup solution
JP54 VCC1.8V
VCC3 VCC3 2 1 SVDDZCMP
SZ1XAVDD SZ4XAVDD NP SHORT ZSTB0 0 R315 NP
C1206 ZSTB1 0 R311 NP
* C305
0.1uF
10uF
C302 * * C304
0.1uF C282
R317 56
R0603
SZCMP_N
C0603
2
JP47
1 SZ1XAVSS
NP C0603
2
JP48
1 SZ4XAVSS * 0.1uF
C0603 R318 56 SZCMP_P ZSTB-0 0 R316 NP
NP SHORT NP SHORT R0603 ZSTB-1 0 R313 NP
JP57
2 1 SVSSZCMP
NP SHORT
A A
FOXCONN PCEG
Title
963-1 PCI/IDE/MUTIOL 1G
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 12 of 40
8 7 6 U11B 5 4 3 2 1
5
5
INITJ
A20MJ
INITJ
A20MJ
T18
P16
INIT#
A20M#
OSC25MHI
OSC25MHO
A8
A9
MCLK25I
MCLK25O 963L-2 MCLK25O
Put closed to 963 CHIP
SMIJ R17 A6
5 SMIJ SMI# TXCLK TXCLK 34
INTR R16 MCLK25I R257 10M NP
5
5
5
INTR
NMI
IGNNEJ
NMI
IGNNEJ
FERRJ
Y20
U18
T17
INTR
NMI
IGNNE#
CPU_S TXEN B6 R255
R0603
22
+/-5%
NP
TXEN 34
+/-5%
1
Y3
R0603
2
5 FERRJ STPCLKJ FERR# C254 C255
5 STPCLKJ W20 STPCLK#
V19 CPUSLP# TXD0 E8 R239
R0603
22
+/-5%
NP
TXD0 34
22pF
C0603 * XTAL-25MHz * 22pF
C0603
Y19
16 PICCLK1
5 APICD0
5 APICD1
V18
W19
APICCK/LDTREQ#
APICD0/THERM2#
APICD1/GPIOFF#
APIC TXD1 D7 R256
R0603
22
+/-5%
NP
TXD1 34
D D
C6 R254 22 NP
27 LAD[0..3] TXD2 TXD2 34
R0603 +/-5%
LAD0 V5
LAD1 LAD0 R252 22 NP
T7 LAD1 TXD3 B4 TXD3 34
LAD2 U6 R0603 +/-5% Analog power of MII SB3V
LFRAME-
LAD3 W5
W4
LAD2
LAD3 LPC A7
Put closed to 963 CHIP
MIIAVDD
C263
27 LFRAME- LFRAME# RXCLK RXCLK 34
27
27
LDRQ-
SIRQ
LDRQ-
SIRQ
U7
V6
LDRQ#
SIRQ
* 0.1uF
C0603
963/963L-2 RXDV C7 RXDV 34
MIIAVSS 2
JP50
1
C8 NP SHORT
RXER RXER 34
OSC32KHI C2
OSC32KHO D2
OSC32KHI
OSC32KHO
MII RXD0 D8 RXD0 34
Put closed to 96X CHIP
35
38
BATOK
SBPWRGD
BATOK D3
D1
BATOK
PWROK
RTC RXD1 A5 RXD1 34
OSC32KHO
OSC32KHI R274 10M
C280 RTCVDD +/-5% R0603
* 0.1uF
C0603 C1 RTCVDD
RXD2 B5 RXD2 34
E4 A4 Y5 XTAL-32.768kHz
RTCVSS RXD3 RXD3 34
1 2
C275 C276
COL B7 COL 34
12pF
C0603 * * 12pF
C0603
3
4
SMBDAT B2
16,17,20 SMBDAT
16,17,20 SMBCLK
SMBCLK A1
GPIO20
GPIO19
GPIO CRS E9 CRS 34
C5 R0603 22 R253
MDC MDC 34 NEED NOT to place
+/-5%
close to 96X
C C
SDATI0 A2 E7 R0603 22 R238
32 SDATI0 AC_SDIN0 MDIO MDIO 34
D5 +/-5%
AC_SDIN1
SDATO W2 B9 MIIAVDD
32
32
SDATO
SYNC
SYNC T5
D6
AC_SDOUT
AC_SYNC AC97 MIIAVDD
MIIAVSS B8 MIIAVSS
VCC3
32 AC_RESET- BIT_CLK AC_RESET#
32 BIT_CLK Y1 AC_BIT_CLK
V2 LDRQ- R348 0 NP
GPIO0 +/-5% R0603
SIRQ R347 0 NP
REFCLK1 W3 T8 +/-5% R0603
16 REFCLK1 SENTEST OSCI GPIO1/LDRQ1# SENTEST R314 100
G5 ENTEST
SPKR V3 R0603 +/-5%
14,32,35 SPKR SPK THERM-
T4
ACPI GPIO2/THERM# THERM- 27
PWRBTN- A14
35
38
PWRBTN-
18,23,24,27 PME-
PSON-
PME-
PSON-
B14
D14
PWRBTN#
PME#
PSON# /others GPIO GPIO3/EXTSMI# T6 GPIO pins pull down
NEED NOT to place VCC3
AUXOK A3 close to 96X
10,35 AUXOK ACPILED AUXOK
35 ACPILED A15 ACPILED GPIO4/CLKRUN# W1
C262
* 0.1uF
C0603
GPIO5/PREQ5# U5 PREQ-5
PREQ-5 27
THERM- R0603 4.7K R321
+/-5%
SMBDAT R0603 4.7K R240
NP +/-5%
R260 4.7K GPIO13 B1 U4 SMBCLK R0603 4.7K R251
R0603 +/-5% GPIO13 GPIO6/PGNT5# +/-5%
NP
SB3V R244 4.7K GPIO14 E5 C4
R0603 +/-5% GPIO14 GPIO7
GPIO8/RING C14
KBDAT E13
28 KBDAT GPIO15/KBDAT
28 KBCLK
KBCLK A16 GPIO16/KBCLK
KBC GPIO9/AC_SDIN2 E6
SB3V
B 28 PMDAT
PMDAT D13 GPIO17/PMDAT
GPIO10/AC_SDIN3 B3
PME- R0603 4.7K R250
B
F5 +/-5%
GPIO11/OSC25M/STP_PCI# FSB0 6,16
PMCLK B15
28 PMCLK GPIO18/PMCLK
GPIO12/CPUSTP# D4 FSB1 6,16
Place near to 96X
SIS963
BIT_CLK
C309
* 10pF
C0603
NP
A A
FOXCONN PCEG
Title
963-2 LPC/MII/CPU/GPIO
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 13 of 40
8 7 6 5 4 3 2 1
963/963L-3
U11C
SB3V
NC12 E11
UCLK48M V4
16 UCLK48M USBCLK48M R308
NC13 C19
UV0+ B18 A19
NC for 963L 4.7K
SB3V
26 UV0+ UV0+ NC14 R0603
D D
UV0- C18
26 UV0- UV1+ UV0- +/-5%
26 UV1+ D18 UV1+ NC15 A20
UV1- D19 EEROM1
26 UV1- UV2+ UV1- GPIO21 GPIO24
26 UV2+ E14 UV2+ GPIO21/EESK F20 1 CS VCC 8
UV2- D15 D20 GPIO22 GPIO21 2 7
26 UV2- UV3+ UV2- GPIO22/EEDI GPIO23 GPIO22 SK NC
26 UV3+ E18 UV3+ GPIO23/EEDO E20 3 DI ORG 6
UV3- F18 C20 GPIO24 GPIO23 4 5
26 UV3- UV4+ UV3- GPIO24/EECS DO GND
26 UV4+ E16 UV4+
UV4- E15 R79 0 +/-5% USB12M
26 UV4- UV4- USB12M 16
UV5+ G18 B16 NP 0 OSC12MHI AT93C46-2.7V
26 UV5+ UV5- UV5+ OSC12MHI R258 +/-5%
26 UV5- G19 UV5-
A17 OSC12MHO
R245 10K OC0- OSC12MHO
SB5V G20 OC0#
+/-5% R0603 G17 F16 USBREF R309 412 +/-1% OSC12MHI
OC1# USBREF R0603
J16
H16
H17
G16
OC2#
OC3#
OC4#
USB USBPVDD
USBPVSS
A18
C15
USBPVDD
USBPVSS
OSC12MHO
R248 10M
SB3V OC5# IVDD_AUX +/-5% R0603
IVDD_AUX C16
D16 C17 IVDD_AUX NP
USBVDD IVDD_AUX
D17 USBVDD
C269 C270 E17 Y4
USBVDD
* 1uF
C0603 * 0.1uF
C0603
F17 USBVDD IPBRST# B11 1 2 NP
F19 C257XTAL-12MHz C256
USBVSS
connect VSS pin
E19
B19
USBVSS
USBVSS
TDFRAME D10
* 10pF
C0603 * 10pF
C0603
B17 NP NP
directly to GND USBVSS
A11
RDFRAME
A12 NC1
E10 SB3V
IPB_RDCLK
B12 NC2
IPB_TDCLK D9
C12 SB1.8V
NC3
IPB_OUT0/PLLENN B10 IPB_OUT0 R372 NP
C C
4.7K IVDD_AUX
D12 C268
NC4
IPB_OUT1/ZCLKSEL A10 IPB_OUT1 R249 NP
4.7K * 0.1uF
C0603
E12 NC5
IPB_IN0 C10
A13 NC6
IPB_IN1 C9
B13 NC7
B20 USBPVDD
USBREFAVDD SB3V
C13 NC8 USBPVDD
D11 NC9 C267 C266
C11 NC10 * 0.1uF
C0603 * 0.1uF
C0603
JP51
SIS963 USBPVSS 2 1
NP SHORT
0 1 Default internal pull-low
(30~50K Ohm) SB Hardware Trap VCC3
B SPKR( LPC addr mapping) disable enable R169 un-stuff yes
SPKR R323 0 +/-5% NP
B
SDATO( Trap from) ROM PCI AD R170 un-stuff yes 13,32,35 SPKR
OC4-( SB debug mode) enable disable R171 un-stuff NO
A A
FOXCONN PCEG
Title
963-3 USB
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 14 of 40
8 7 6 5 4 3 2 1
VCC3 VCC1.8V SB1.8V
VCC1.8V 963/963L-4
D D
*
C264 0.1uF
C0603 C253 0.1uF VCC1.8V U11D
*
*
C332 C0603 NP C0603
0.1uF G15 H8
VDDZ VSS
J15 VDDZ VSS H9
*
*
C281 1uF C265 0.1uF J19 H10
VDDZ VSS
*
C297 0.1uF C0603 C0603 L15 H11
C0603 VDDZ VSS
L19 VDDZ VSS H12
N15 VDDZ VSS H13
P19 VDDZ VSS J8
*
C301 1uF C295 0.1uF K15 J9
PVDDZ VSS
*
C0603 C0603 G6 J10
VCCP IVDD VSS
H15 IVDD VSS J11
L6 IVDD VSS J12
*
C303 0.1uF VCC1.8V VCC2.5_MEM M15 K8
IVDD VSS
*
C0603 C279 0.1uF C298 0.1uF R6 K9
IVDD VSS
*
C0603 C0603 R10 K10
VCCP IVDD VSS
R14 IVDD VSS K11
*
*
C331 0.1uF C277 0.1uF L8
C0603 NP C0603 VSS
P15 VTT VSS L9
*
C252 0.1uF C300 0.1uF R15 L10
VTT VSS
*
C0603 C0603 VCC3 L11
VSS
VSS M8
H6 OVDD VSS M9
K6 OVDD VSS M10
M6 OVDD VSS M11
P6 OVDD VSS N8
R7 OVDD VSS N9
R9 OVDD VSS N10
R11 N11
R13
J6
OVDD
OVDD Power VSS
VSS
VSS
N12
N13
PVDD
N6 PVDD
R8 PVDD
SB1.8V R12
VCCP PVDD
VSSZ J13
Put under 96X solder side F9 IVDD_AUX VSSZ J17
C C
SB3V F12 K12
IVDD_AUX VSSZ
*
C400 0.1uF K13
NP C0603 VSSZ
F7 OVDD_AUX VSSZ L12
F10 OVDD_AUX VSSZ L13
VCC1.8V C274 F11 L17
OVDD_AUX VSSZ
* 0.1uF F14
F15
OVDD_AUX
OVDD_AUX
VSSZ
VSSZ
M12
M13
*
C398 0.1uF C0603 P17
NP C0603 VSSZ
F8 PVDD_AUX
VCC3 SB3V F13 PVDD_AUX
*
*
*
C394 0.1uF C401 0.1uF C396 0.1uF SIS963
NP C0603 NP C0603 NP C0603
*
C393 0.1uF
*
C399 0.1uF NP C0603
NP C0603
SB1.8V
C397 0.1uF
*
NP C0603
*
C395 0.1uF
NP C0603
B B
A A
FOXCONN PCEG
Title
963-4 POWER
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 15 of 40
5 4 3 2 1
Main Clock Generator
By-Pass Capacitors
VCC3 Place near to the Clock Outputs
>
CPUCLK C102 10pF
*
ICS: 952703 NP
2
CPUCLKJ C104 10pF
*
L13 NP
0 741CCLK C100 10pF
CLK_X1
CLK_X2
*
D D
VCC3 NP
L12
1
CLK_3.3V
Y2
1 2 CLK_3V CLK_AVDD 2 1
0
C96
10pF
*
XTAL-14.318MHz
*
C101
10pF * C88
0.1uF * C105
0.1uF * C94
0.1uF
VCC2.5_MEM
* * C107
* C110 AGPCLK0 C114 10pF
*
C0603 C0603 C0603 C0603 C0603 L8 C108 0.1uF 0.1uF C0603
* EC12 2 1CLK_2.5V 1nF C0603 C0603 AGPCLK1 C118 10pF NP
* * *
*
22uF C109 C119 C120 0 C0603 C0603
CE20D50H110 0.1uF 0.1uF 0.1uF NP
C0603 C0603 C0603 EC9
* * C89 ZCLK0 C103 10pF
*
22uF 0.1uF C0603
CE20D50H110 C0603 ZCLK1 C106 10pF NP
*
C0603
NP
Damping Resistors Damping Resistors 96XPCLK C112 10pF
*
Place near to the CLK_3.3V CLK_3.3V Place near to the C0603
Clock Outputs CLK1 Clock Outputs SIOPCLK C117 10pF NP
*
C0603
1 48 PCICLK1 NP C122 10pF
VDDREF VDDAPIC
*
REFCLK1 R52 33 FS0 2 47 _IOAPIC1 R51 10 PICCLK1 C0603
13 REFCLK1 FS0/REF0 IOAPIC1 PICCLK1 13
10 VOSCI VOSCI R56 33 FS1 3 46 _IOAPIC0 R55 10 PICCLKCPU PCICLK2 C126 10pF NP
FS1/REF1 IOAPIC0 PICCLKCPU 5
*
REFCLK2 R57 33 MODE 4 45 C0603
32 AC97CLK MODE/REF2 GNDAPIC
5 44 PCICLK3 NP C127 10pF
GNDREF VDDSRC
* *
CLK_X1 6 43 C0603
CLK_X2 X1 SRCCLKT
7 X2 SRCCLKC 42 NP
8 41 PICCLK1 C92 10pF
ZCLK0 R62 33 _ZCLK0 GNDZ GND _CPUCLK_1T R60 10 741CCLK C0603
10 ZCLK0 9 ZCLK0 CPUCLKODT1 40 741CCLK 8
ZCLK1 R67 33 _ZCLK1 10 39 PICCLKCPU C95 10pF NP
12 ZCLK1 ZCLK1 GNDCPU
*
11 38 _CPUCLK_0T R61 10 CPUCLK C0603
VDDZ CPUCLKODT0 CPUCLK 5
SMBCLK 12 37 _CPUCLK_0C R63 10 CPUCLKJ NP
13,17,20 SMBCLK SCLK CPUCLKODC0 CPUCLKJ 5
13 36 CLK_AVDD
96XPCLK R68 33 FS2 VDDPCI AVDD REFCLK1 C91 10pF
12 96XPCLK 14 FS2/PCICLK_F0 AGND 35
*
SIOPCLK R78 33 FS3 15 34 R69 475 C0603
27 SIOPCLK FS3/PCICLK_F1 IREF
PCICLK1 R80 33 NP _PCICLK0 16 33 +/-1% SMBDAT VOSCI C93 10pF NP
23 PCICLK1 PCICLK0 SDATA SMBDAT 13,17,20
*
PCICLK2 R84 33 NP _PCICLK1 17 32 C0603
23 PCICLK2 PCICLK1 GNDAGP
C 18 31 _AGPCLK0 R72 22 AGPCLK0 REFCLK2 NP C97 10pF C
GNDPCI AGPCLK0 AGPCLK0 8
*
19 30 _AGPCLK1 R77 22 AGPCLK1 C0603
VDDPCI AGPCLK1 AGPCLK1 18
PCICLK3 R81 33 NP _PCICLK2 20 29 NP
24 PCICLK3 PCICLK2 VDDAGP
21 28 R76 22 USB12M UCLK48M C121 10pF
PCI_STOP#/PCICLK3 AVDD48 USB12M 14
*
22 27 48MHZ R73 22NP UCLK48M C0603
CPU_STOP#/PCICLK4 48MHZ UCLK48M 14
23 26 SEL24_48 R86 22 SIO48M SIO48M NP C123 10pF
PD#/PCICLK5 24_48MHZ/SEL24_48#MHZ SIO48M 27
*
24 25 C0603
GNDPCI GND48
NP
R85 22 UCLK48M
UCLK48M 14
ICS952703
PCICLK1 _PCICLK0
VCC1.8V VCC3 CLK_3.3V
SB3V CLK_3.3V
* C299
0.1uF
C0603 R70 R82
NP 10K 10K
96XPCLK Cross Mout R47
10K
FSB1 R71 10K FS2 FS1 SEL24_48
6,13 FSB1
R0603 +/-5%
FS0 48MHZ
SB3V
R53
10K
NP R46
R75 10K
10K NP R83 R87
10K 10K
R74
NP NP
FSB0 FS3
6,13 FSB0
10K
B B
Different clock generator with different frequency define table
SiS 741 CLOCK ( ICS952703 ) SiS 741 CLOCK ( ICS952703 )
(Bit4) (FS3) (FS2) (FS1) (FS0) CPU ZCLK AGPCLK PCI SATA (Bit4) (FS3) (FS2) (FS1) (FS0) CPU ZCLK AGPCLK PCI SATA
(MHz) (MHz) (MHz) (MHz) (MHz) (MHz) (MHz) (MHz) (MHz) (MHz)
0 0 0 0 0 200 133.33 66.67 33.33 100 1 0 0 0 0 206 137.33 68.67 34.33 103
0 0 0 0 1 200 133.33 66.67 33.33 100 1 0 0 0 1 210 140 70 35 105
0 0 0 1 0 200.99 133.99 67 33.5 100.5 1 0 0 1 0 214 142.67 71.33 35.67 107
0 0 0 1 1 190 126.67 63.33 31.67 95 1 0 0 1 1 218 145.33 72.67 36.33 109
0 0 1 0 0 100 133.33 66.67 33.33 100 1 0 1 0 0 103 137.33 68.67 34.33 103
0 0 1 0 1 100 133.33 66.67 33.33 100 1 0 1 0 1 105 140 70 35 105
0 0 1 1 0 100.99 134.65 67.33 33.66 100.99 1 0 1 1 0 107 142.67 71.33 35.67 107
0 0 1 1 1 95 126.67 63.33 31.67 95 1 0 1 1 1 109 145.33 72.67 36.33 109
0 1 0 0 0 160 133.33 66.67 33.33 100 1 1 0 0 0 164.8 137.33 68.67 34.33 103
0 1 0 0 1 166.66 138.88 69.44 34.72 104.16 1 1 0 0 1 168 140 70 35 105
0 1 0 1 0 161.58 134.65 67.33 33.66 100.99 1 1 0 1 0 171.2 142.67 71.33 35.67 107
0 1 0 1 1 152 126.67 63.33 31.67 95 1 1 0 1 1 174.4 145.33 72.67 36.33 109
0 1 1 0 0 133.33 133.33 66.67 33.33 100 1 1 1 0 0 137.33 137.33 68.67 34.33 103
0 1 1 0 1 133.33 133.33 66.67 33.33 100 1 1 1 0 1 140 140 70 35 105
0 1 1 1 0 133.99 133.99 67 33.5 100.49 1 1 1 1 0 142.67 142.67 71.34 35.67 107
0 1 1 1 1 126.66 126.66 63.33 31.67 95 1 1 1 1 1 145.33 145.33 72.67 36.33 109
A A
FOXCONN PCEG
Title
CLK Generator
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 16 of 40
5 4 3 2 1
8 7 6 5 4 3 2 1
VCC2.5_MEM
CBVDD
* C335
0.1uF
*
C337
10nF * C360
0.1uF
C0603 C0603 C0603
* C336
10nF
C351 DDRCLK[0..5] 20
D
C0603
* C354
0.1uF * 0.1uF
DDRCLK-[0..5] 20 D
C0603 C0603
Clock Buffer (DDR)
U14
93732
CBVDD 3 VDD
12 VDD
1
23 VDD
JP56
SHORT
VCC2.5_MEM NP
2
NP
R357 0 CAVDD 10 2 DDRCLK0
R0805 +/-5% AVDD CLK0 DDRCLK1 DDRCLK0 20
CLK1 4 DDRCLK1 20
* C357
10uF * C358
0.1uF * C356
10nF CLK2
CLK3
13
17
DDRCLK2
DDRCLK3 DDRCLK2
DDRCLK3
20
20
C1206 C0603 C0603 24 DDRCLK4
NP NP NP CLK4 DDRCLK5 DDRCLK4 20
11 AGND CLK5 26 DDRCLK5 20
SMBCLK R358 22 7 1 DDRCLK-0
13,16,20 SMBCLK SCLK CLK#0 DDRCLK-0 20
SMBDAT R359 22 22 5 DDRCLK-1
13,16,20 SMBDAT SDATA CLK#1 DDRCLK-1 20
14 DDRCLK-2
FWDSDCLKO- CLK#2 DDRCLK-3 DDRCLK-2 20
9 FWDSDCLKO- 8 CLK_IN CLK#3 16 DDRCLK-3 20
25 DDRCLK-4
CLK#4 DDRCLK-4 20
C C
27 DDRCLK-5
CLK#5 DDRCLK-5 20
18 NC1
19 R365 22
FB_OUT
20 FB_IN NC3 21
* C361
10pF
9 NC2 C0603
GND
GND
GND
close to clock buffer
6
28
15
FB_OUT
B B
A A
FOXCONN PCEG
Title
DDR Clock Buffer
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 17 of 40
8 SBA-[0..7]
7 6 5 4 3 2 1
8 SBA-[0..7]
ST[0..2] VCC5 +12V
NOTE: This AGP slot support
8 ST[0..2]
AC-BE[0..3]
both AGP3.0 display card GCDET- on card GCDET- AVREFCG APERR
8 AC-BE[0..3]
AAD[0..31]
VDDQ and SiS301 video bridge
SB3V GND 0V 0.35V 0V
8 AAD[0..31] card.
ADSTBF[0..1]
8 ADSTBF[0..1] VCC3 OPEN 1.47V 0.75V 1.5V
ADSTBS[0..1] VDDQ VCC3
8 ADSTBS[0..1]
AGP
B1 OVRCNT# +12V A1
B2 +5V TYPEDET# A2
D D
B3 A3 GCDET-
+5V GC_AGP8X_DET GCDET- 8
B4 USB+ USB- A4
B5 GND GND A5
INT-B B6 A6 INT-A
12,23,24 INT-B INTB# INTA# INT-A 10,12,23,24
AGPCLK1 B7 A7 PCIRST-
16 AGPCLK1 CLK RST# PCIRST- 12,23,24,25
AREQ B8 A8 AGNT
8 AREQ REQ# GNT# AGNT 8
B9 VCC3.3 VCC3.3 A9
ST0 B10 A10 ST1
ST2 ST0 ST1
B11 ST2 MB_AGP8X_DET A11
RBF B12 A12 DBI_HI
8 RBF RBF# PIPE# DBI_HI 8
B13 GND GND A13
B14 A14 WBF
8 DBI_LOW RESERVEDB14 WBF# WBF 8
SBA-0 B15 A15 SBA-1
SBA0 SBA1
B16 VCC3.3 VCC3.3 A16
SBA-2 B17 A17 SBA-3
SBA2 SBA3
8 SBSTBF
SBSTBF B18 SB_STB SB_STB# A18 SBSTBS
SBSTBS 8 close to AGP SLOT
B19 GND GND A19
SBA-4 B20 A20 SBA-5
SBA-6 SBA4 SBA5 SBA-7 VCC3 VCC5 VDDQ
B21 SBA6 SBA7 A21
B22 DBI_LO DBI_HI A22
B23 GND GND A23
B24 VCC3_AUX RESERVEDA24 A24
B25 VCC3.3 VCC3.3 A25
AAD31 B26 A26 AAD30 R210
AAD29 AD31 AD30 AAD28 124
B27 AD29 AD28 A27
B28 A28 R100 +/-1%
AAD27 VCC3.3 VCC3.3 AAD26 R103 10K
B29 AD27 AD26 A29
AAD25 B30 A30 AAD24 10K R154 AVREFCG
AD25 AD24 54.9
B31 GND GND A31
D
ADSTBF1 B32 A32 ADSTBS1
AAD23 AD_STB1 AD_STB1# AC-BE3 Q13 R157
B33 AD23 C/BE3# A33
B34 A34 124 C157
VDDQ VDDQ
AAD21
AAD19
B35
B36
AD21
AD19
AD22
AD20
A35
A36
AAD22
AAD20
G
2N7002
+/-1%
* 10nF
C0603
B37 GND GND A37
C
S
AAD17 B38 A38 AAD18
AC-BE2 AD17 AD18 AAD16 GCDET- R110 Q12
B39 C/BE#2 AD16 A39 B
B40 A40 4.3K MMBT3904
VDDQ VDDQ
C C
AIRDY B41 A41 AFRAME
IRDY# FRAME# AFRAME 8
E
8 AIRDY
VDDQ
B46 A46 ATRDY
8 ADEVSEL DEVEL# TRDY# ATRDY 8
B47 A47 ASTOP
VDDQ STOP# ASTOP 8
APERR B48 A48 PME- R176
PERR# PME# PME- 13,23,24,27
B49 A49 8.2K
GND GND APAR APERR
8 ASERR B50 SERR# PAR A50 APAR 8
D
AC-BE1 B51 A51 AAD15
C/BE1# AD15
B52 VDDQ VDDQ A52
AAD14 B53 A53 AAD13 Q14
AAD12 AD14 AD13 AAD11 2N7002
B54 AD12 AD11 A54 G
B55 GND GND A55
AAD10 B56 A56 AAD9
AD10 AD9
S
AAD8 B57 A57 AC-BE0
AD8 C/BE0#
B58 VDDQ VDDQ A58
ADSTBF0 B59 A59 ADSTBS0
AAD7 AD_STB0 AD_STB0# AAD6 R168
B60 AD7 AD6 A60
B61 A61 1K
AAD5 GND GND AAD4
B62 AD5 AD4 A62
AAD3 B63 A63 AAD2
AD3 AD2
B64 VDDQ VDDQ A64
AAD1 B65 A65 AAD0
AVREFCG AD1 AD0
B66 VREF_CG VREF_GC A66 AVREFGC 8
1
2
3
1
2
3
AGP CONNECTOR DECOUPLING * C239 close to 660
AGP_SLOT_132P 0.1uF
C0603
put CAP close to AGP slot each POWER PIN
VDDQ VCC3 +12V VCC5 SB3V
B B
VDDQ
C198 C223 C207 C218 C153 C185 C362 C188 C133 C146 C186 C259
* EC28
22uF
*10nF * 10nF * 10nF * 10nF * 10nF * 10nF * C0603 * 10nF * 10nF * 10nF * 10nF *10nF CE20D50H110
C0603 C0603 C0603 C0603 C0603 C0603 10nF C0603 C0603 C0603 C0603 C0603
A A
FOXCONN PCEG
Title
AGP
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 18 of 40
5 4 3 2 1
VCC5
D D
* NP
C84
CONNECTOR
TOP VIEW
VCC5
0.1uF
C0603
R16 R17
2.2K 2.2K
VGA
ET1206L VGA
5 GND SCL 15 DDC1CLK
19ohm@100MHz? GND 10 DDC1CLK 10
4 ID0 VSYNC 14 VSYNC
NC 9 VSYNC 10
100nH
BPUT L3 1 2 3 B HSYNC 13 HSYNC
10 BOUT GND 8 HSYNC 10
100nH
GOUT L2 1 2 2 G SDA 12 DDC1DATA
10 GOUT GND 7 DDC1DATA 10
100nH
ROUT L1 1 2 1 R ID1 11
10 ROUT GND 6
* * * VGA15P
17
16
R64 C37 R65 C38 R66 C39 C52 C40 C41 C51
75 6.8pF
C0603
75 6.8pF
C0603
75 6.8pF
C0603
*
C16
6.8pF
*
C15
6.8pF
*
C14
6.8pF * 470pF
C0603 * 470pF
C0603 * 470pF
C0603 * 470pF
C0603
C0603 C0603 C0603 NP NP NP NP
close to GND gap
C C
B B
A A
FOXCONN PCEG
Title
VGA Connector
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 19 of 40
5 4 3 2 1
9,22 /RMD[0..63] 8 /RMD[0..63] 7 6 /RMD[0..63] 5 4 3 2 1
/RMA[0..15] /RMA[0..14]
9,22 /RMA[0..15] VCC2.5_MEM VCC2.5_MEM
/RDQM[0..7] /RDQM[0..7]
9,22 /RDQM[0..7]
/RDQS[0..7] /RDQS[0..7]
9,22 /RDQS[0..7]
108
180
172
164
156
143
136
128
112
104
108
180
172
164
156
143
136
128
112
104
DIMM1 DIMM2
85
70
46
38
96
77
62
54
30
22
15
85
70
46
38
96
77
62
54
30
22
15
7
7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
120 VDD 120 VDD
NOTE: 148 2 /RMD0 148 2 /RMD0
VDD DQ0 /RMD1 VDD DQ0 /RMD1
168 VDD DQ1 4 168 VDD DQ1 4
VDDID IS A TRAP ON THE DIMM 184 6 /RMD2 184 6 /RMD2
VDDSPD DQ2 VDDSPD DQ2
D
MODULE TO INDICATE:
D
8 /RMD3 8 /RMD3
/RMA0 DQ3 /RMD4 /RMA0 DQ3 /RMD4
48 A0 DQ4 94 48 A0 DQ4 94
VDDID REQUIRED POWER /RMA1 43 95 /RMD5 /RMA1 43 95 /RMD5
OPEN VDD=VDDQ /RMA2 A1 DQ5 /RMD6 /RMA2 A1 DQ5 /RMD6
41 A2 DQ6 98 41 A2 DQ6 98
GND VDD!=VDDQ /RMA3 130 99 /RMD7 /RMA3 130 99 /RMD7
/RMA4 A3 DQ7 /RMD8 /RMA4 A3 DQ7 /RMD8
37 A4 DQ8 12 37 A4 DQ8 12
/RMA5 32 13 /RMD9 /RMA5 32 13 /RMD9
MEMORY MUX TABLE: /RMA6 A5 DQ9 /RMD10 /RMA6 A5 DQ9 /RMD10
125 A6 DQ10 19 125 A6 DQ10 19
/RMA7 29 20 /RMD11 /RMA7 29 20 /RMD11
SDR DDR /RMA8 A7 DQ11 /RMD12 /RMA8 A7 DQ11 /RMD12
122 A8 DQ12 105 122 A8 DQ12 105
CS0 CS0 /RMA9 27 106 /RMD13 /RMA9 27 106 /RMD13
CS1 CS1 /RMA10 A9 DQ13 /RMD14 /RMA10 A9 DQ13 /RMD14
141 A10 DQ14 109 141 A10 DQ14 109
CS2 CS2 /RMA13 118 110 /RMD15 /RMA13 118 110 /RMD15
CS3 CS3 /RMA14 A11 DQ15 /RMD16 /RMA14 A11 DQ15 /RMD16
115 A12 DQ16 23 115 A12 DQ16 23
CS4 CS4 103 24 /RMD17 103 24 /RMD17
CS5 CS5 NC9 DQ17 /RMD18 NC9 DQ17 /RMD18
DQ18 28 DQ18 28
CSB0 DQS0 /RMA11 59 31 /RMD19 /RMA11 59 31 /RMD19
CSB1 DQS1 /RMA12 BA0 DQ19 /RMD20 /RMA12 BA0 DQ19 /RMD20
52 BA1 DQ20 114 52 BA1 DQ20 114
CSB2 DQS2 113 117 /RMD21 113 117 /RMD21
CSB3 DQS3 BA2 DQ21 /RMD22 BA2 DQ21 /RMD22
DQ22 121 DQ22 121
CSB4 DQS4 /RDQM0 97 123 /RMD23 /RDQM0 97 123 /RMD23
CSB5 DQS5 /RDQM1 DM0 DQ23 /RMD24 /RDQM1 DM0 DQ23 /RMD24
107 DM1 DQ24 33 107 DM1 DQ24 33
CSB6 DQS6 /RDQM2 119 35 /RMD25 /RDQM2 119 35 /RMD25
CSB7 DQS7 /RDQM3 DM2 DQ25 /RMD26 /RDQM3 DM2 DQ25 /RMD26
129 DM3 DQ26 39 129 DM3 DQ26 39
/RDQM4 149 40 /RMD27 /RDQM4 149 40 /RMD27
/RDQM5 DM4 DQ27 /RMD28 /RDQM5 DM4 DQ27 /RMD28
159 DM5 DQ28 126 159 DM5 DQ28 126
/RDQM6 169 127 /RMD29 /RDQM6 169 127 /RMD29
/RDQM7 DM6 DQ29 /RMD30 /RDQM7 DM6 DQ29 /RMD30
177 DM7 DQ30 131 177 DM7 DQ30 131
VCC2.5_MEM R302 8.2K 140 133 /RMD31 VCC2.5_MEM R303 140 133 /RMD31
+/-5% R0603 DM8 DQ31 /RMD32 8.2K DM8 DQ31 /RMD32
DQ32 53 DQ32 53
/RDQS0 5 55 /RMD33 /RDQS0 5 55 /RMD33
/RDQS1 DQS0 DQ33 /RMD34 /RDQS1 DQS0 DQ33 /RMD34
14 DQS1 DQ34 57 14 DQS1 DQ34 57
/RDQS2 25 60 /RMD35 /RDQS2 25 60 /RMD35
/RDQS3 DQS2 DQ35 /RMD36 /RDQS3 DQS2 DQ35 /RMD36
36 DQS3 DQ36 146 36 DQS3 DQ36 146
/RDQS4 56 147 /RMD37 /RDQS4 56 147 /RMD37
/RDQS5 DQS4 DQ37 /RMD38 /RDQS5 DQS4 DQ37 /RMD38
67 DQS5 DQ38 150 67 DQS5 DQ38 150
/RDQS6 78 151 /RMD39 /RDQS6 78 151 /RMD39
/RDQS7 DQS6 DQ39 /RMD40 /RDQS7 DQS6 DQ39 /RMD40
86 DQS7 DQ40 61 86 DQS7 DQ40 61
C C
47 64 /RMD41 47 64 /RMD41
DQS8 DQ41 /RMD42 DQS8 DQ41 /RMD42
DQ42 68 DQ42 68
44 69 /RMD43 44 69 /RMD43
CB0 DQ43 /RMD44 CB0 DQ43 /RMD44
45 CB1 DQ44 153 45 CB1 DQ44 153
49 155 /RMD45 49 155 /RMD45
CB2 DQ45 /RMD46 CB2 DQ45 /RMD46
51 CB3 DQ46 161 51 CB3 DQ46 161
134 162 /RMD47 134 162 /RMD47
CB4 DQ47 /RMD48 CB4 DQ47 /RMD48
135 CB5 DQ48 72 135 CB5 DQ48 72
142 73 /RMD49 142 73 /RMD49
CB6 DQ49 /RMD50 CB6 DQ49 /RMD50
144 CB7 DQ50 79 144 CB7 DQ50 79
80 /RMD51 80 /RMD51
DQ51 /RMD52 DQ51 /RMD52
9 NC1 DQ52 165 9 NC1 DQ52 165
10 166 /RMD53 10 166 /RMD53
NC5(RESET#) DQ53 /RMD54 NC5(RESET#) DQ53 /RMD54
101 NC2 DQ54 170 101 NC2 DQ54 170
102 171 /RMD55 102 171 /RMD55 VCC2.5_MEM
NC3 DQ55 /RMD56 NC3 DQ55 /RMD56
173 NC4 DQ56 83 173 NC4 DQ56 83
/RMA15 167 84 /RMD57 /RMA15 167 84 /RMD57
A13 DQ57 /RMD58 A13 DQ57 /RMD58
DQ58 87 DQ58 87
/RSRAS- 154 88 /RMD63 /RSRAS- 154 88 /RMD63
9,22 /RSRAS- /RSCAS- RAS# DQ59 /RMD60 /RSCAS- RAS# DQ59 /RMD60 R275
9,22 /RSCAS- 65 CAS# DQ60 174 65 CAS# DQ60 174
/RRAMWA- 63 175 /RMD61 /RRAMWA- 63 175 /RMD61 4.7K
9,22 /RRAMWA- WE# DQ61 /RMD62 WE# DQ61 /RMD62 +/-5%
DQ62 178 DQ62 178
/RCS-0 157 179 /RMD59 /RCS-2 157 179 /RMD59 R0603
/RCS-1 S0# DQ63 /RCS-3 S0# DQ63
158 S1# 158 S1#
71 1 DDRVREF 71 1 DDRVREF
NC6(S2#) VREF NC6(S2#) VREF DDRVREF 22
163 NC7(S3#) 163 NC7(S3#)
VDDID 82 VDDID 82
CKE0 21 90 WP CKE2 21 90 WP
CKE1 CKE0 WP SMBCLK CKE3 CKE0 WP SMBCLK
111 CKE1 SCL 92 111 CKE1 SCL 92
91 SMBDAT 91 SMBDAT SMBCLK 13,16,17
DDRCLK0 SDA DDRCLK5 SDA SMBDAT 13,16,17
137 CK0 137 CK0
DDRCLK3 16 addr = 181 DDRCLK4 16 addr = 181 R322 8.2K
CK1 SA0 CK1 SA0 VCC2.5_MEM
DDRCLK2 76 182 DDRCLK1 76 182
DDRCLK-0 CK2 1010000b SA1 DDRCLK-5 CK2 1010001b SA1
138 CK0# SA2 183 138 CK0# SA2 183
DDRCLK-3 17 DDRCLK-4 17
DDRCLK-2 CK1# DDRCLK-1 CK1#
75 CK2# 75 CK2#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B 9,22 /RCS-[0..3]
/RCS-[0..3]
DDR_DIMM DDR_DIMM
B
176
160
152
145
139
132
124
116
100
93
89
81
74
66
58
50
42
34
26
18
11
3
176
160
152
145
139
132
124
116
100
93
89
81
74
66
58
50
42
34
26
18
11
3
CKE[0..3]
9 CKE[0..3]
17 DDRCLK[0..5]
17 DDRCLK-[0..5]
A A
FOXCONN PCEG
Title
DIMM1 & DIMM2
Size Document Number Rev
C 741M01C A
Date: Monday, June 07, 2004 Sheet 20 of 40
